1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 */
7
8 #include <linux/platform_device.h>
9 #include <linux/mtd/mtd.h>
10 #include <linux/mtd/physmap.h>
11 #include <linux/gpio/driver.h>
12 #include <linux/gpio/machine.h>
13 #include <linux/gpio.h>
14 #include <linux/regulator/fixed.h>
15 #include <linux/regulator/machine.h>
16 #include <asm/mach-types.h>
17 #include <asm/mach/arch.h>
18
19 #include "common.h"
20 #include "devices-imx21.h"
21 #include "hardware.h"
22 #include "iomux-mx21.h"
23
24 #define MX21ADS_CS8900A_REG (MX21_CS1_BASE_ADDR + 0x000000)
25 #define MX21ADS_ST16C255_IOBASE_REG (MX21_CS1_BASE_ADDR + 0x200000)
26 #define MX21ADS_VERSION_REG (MX21_CS1_BASE_ADDR + 0x400000)
27 #define MX21ADS_IO_REG (MX21_CS1_BASE_ADDR + 0x800000)
28
29 #define MX21ADS_MMC_CD IMX_GPIO_NR(4, 25)
30 #define MX21ADS_CS8900A_IRQ_GPIO IMX_GPIO_NR(5, 11)
31 #define MX21ADS_MMGPIO_BASE (6 * 32)
32
33 /* MX21ADS_IO_REG bit definitions */
34 #define MX21ADS_IO_SD_WP (MX21ADS_MMGPIO_BASE + 0)
35 #define MX21ADS_IO_TP6 (MX21ADS_IO_SD_WP)
36 #define MX21ADS_IO_SW_SEL (MX21ADS_MMGPIO_BASE + 1)
37 #define MX21ADS_IO_TP7 (MX21ADS_IO_SW_SEL)
38 #define MX21ADS_IO_RESET_E_UART (MX21ADS_MMGPIO_BASE + 2)
39 #define MX21ADS_IO_RESET_BASE (MX21ADS_MMGPIO_BASE + 3)
40 #define MX21ADS_IO_CSI_CTL2 (MX21ADS_MMGPIO_BASE + 4)
41 #define MX21ADS_IO_CSI_CTL1 (MX21ADS_MMGPIO_BASE + 5)
42 #define MX21ADS_IO_CSI_CTL0 (MX21ADS_MMGPIO_BASE + 6)
43 #define MX21ADS_IO_UART1_EN (MX21ADS_MMGPIO_BASE + 7)
44 #define MX21ADS_IO_UART4_EN (MX21ADS_MMGPIO_BASE + 8)
45 #define MX21ADS_IO_LCDON (MX21ADS_MMGPIO_BASE + 9)
46 #define MX21ADS_IO_IRDA_EN (MX21ADS_MMGPIO_BASE + 10)
47 #define MX21ADS_IO_IRDA_FIR_SEL (MX21ADS_MMGPIO_BASE + 11)
48 #define MX21ADS_IO_IRDA_MD0_B (MX21ADS_MMGPIO_BASE + 12)
49 #define MX21ADS_IO_IRDA_MD1 (MX21ADS_MMGPIO_BASE + 13)
50 #define MX21ADS_IO_LED4_ON (MX21ADS_MMGPIO_BASE + 14)
51 #define MX21ADS_IO_LED3_ON (MX21ADS_MMGPIO_BASE + 15)
52
53 static const int mx21ads_pins[] __initconst = {
54
55 /* CS8900A */
56 (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11),
57
58 /* UART1 */
59 PE12_PF_UART1_TXD,
60 PE13_PF_UART1_RXD,
61 PE14_PF_UART1_CTS,
62 PE15_PF_UART1_RTS,
63
64 /* UART3 (IrDA) - only TXD and RXD */
65 PE8_PF_UART3_TXD,
66 PE9_PF_UART3_RXD,
67
68 /* UART4 */
69 PB26_AF_UART4_RTS,
70 PB28_AF_UART4_TXD,
71 PB29_AF_UART4_CTS,
72 PB31_AF_UART4_RXD,
73
74 /* LCDC */
75 PA5_PF_LSCLK,
76 PA6_PF_LD0,
77 PA7_PF_LD1,
78 PA8_PF_LD2,
79 PA9_PF_LD3,
80 PA10_PF_LD4,
81 PA11_PF_LD5,
82 PA12_PF_LD6,
83 PA13_PF_LD7,
84 PA14_PF_LD8,
85 PA15_PF_LD9,
86 PA16_PF_LD10,
87 PA17_PF_LD11,
88 PA18_PF_LD12,
89 PA19_PF_LD13,
90 PA20_PF_LD14,
91 PA21_PF_LD15,
92 PA22_PF_LD16,
93 PA24_PF_REV, /* Sharp panel dedicated signal */
94 PA25_PF_CLS, /* Sharp panel dedicated signal */
95 PA26_PF_PS, /* Sharp panel dedicated signal */
96 PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
97 PA28_PF_HSYNC,
98 PA29_PF_VSYNC,
99 PA30_PF_CONTRAST,
100 PA31_PF_OE_ACD,
101
102 /* MMC/SDHC */
103 PE18_PF_SD1_D0,
104 PE19_PF_SD1_D1,
105 PE20_PF_SD1_D2,
106 PE21_PF_SD1_D3,
107 PE22_PF_SD1_CMD,
108 PE23_PF_SD1_CLK,
109
110 /* NFC */
111 PF0_PF_NRFB,
112 PF1_PF_NFCE,
113 PF2_PF_NFWP,
114 PF3_PF_NFCLE,
115 PF4_PF_NFALE,
116 PF5_PF_NFRE,
117 PF6_PF_NFWE,
118 PF7_PF_NFIO0,
119 PF8_PF_NFIO1,
120 PF9_PF_NFIO2,
121 PF10_PF_NFIO3,
122 PF11_PF_NFIO4,
123 PF12_PF_NFIO5,
124 PF13_PF_NFIO6,
125 PF14_PF_NFIO7,
126 };
127
128 /* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
129 static struct physmap_flash_data mx21ads_flash_data = {
130 .width = 4,
131 };
132
133 static struct resource mx21ads_flash_resource =
134 DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);
135
136 static struct platform_device mx21ads_nor_mtd_device = {
137 .name = "physmap-flash",
138 .id = 0,
139 .dev = {
140 .platform_data = &mx21ads_flash_data,
141 },
142 .num_resources = 1,
143 .resource = &mx21ads_flash_resource,
144 };
145
146 static struct resource mx21ads_cs8900_resources[] __initdata = {
147 DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
148 /* irq number is run-time assigned */
149 DEFINE_RES_IRQ(-1),
150 };
151
152 static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
153 .name = "cs89x0",
154 .id = 0,
155 .res = mx21ads_cs8900_resources,
156 .num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
157 };
158
159 static const struct imxuart_platform_data uart_pdata_rts __initconst = {
160 .flags = IMXUART_HAVE_RTSCTS,
161 };
162
163 static const struct imxuart_platform_data uart_pdata_norts __initconst = {
164 };
165
166 static struct resource mx21ads_mmgpio_resource =
167 DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
168
169 static struct bgpio_pdata mx21ads_mmgpio_pdata = {
170 .label = "mx21ads-mmgpio",
171 .base = MX21ADS_MMGPIO_BASE,
172 .ngpio = 16,
173 };
174
175 static struct platform_device mx21ads_mmgpio = {
176 .name = "basic-mmio-gpio",
177 .id = PLATFORM_DEVID_AUTO,
178 .resource = &mx21ads_mmgpio_resource,
179 .num_resources = 1,
180 .dev = {
181 .platform_data = &mx21ads_mmgpio_pdata,
182 },
183 };
184
185 static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
186 REGULATOR_SUPPLY("lcd", "imx-fb.0");
187
188 static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
189 .constraints = {
190 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
191 },
192 .consumer_supplies = &mx21ads_lcd_regulator_consumer,
193 .num_consumer_supplies = 1,
194 };
195
196 static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
197 .supply_name = "LCD",
198 .microvolts = 3300000,
199 .init_data = &mx21ads_lcd_regulator_init_data,
200 };
201
202 static struct platform_device mx21ads_lcd_regulator = {
203 .name = "reg-fixed-voltage",
204 .id = PLATFORM_DEVID_AUTO,
205 .dev = {
206 .platform_data = &mx21ads_lcd_regulator_pdata,
207 },
208 };
209
210 static struct gpiod_lookup_table mx21ads_lcd_regulator_gpiod_table = {
211 .dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
212 .table = {
213 GPIO_LOOKUP("mx21ads-mmgpio", 9, NULL, GPIO_ACTIVE_HIGH),
214 { },
215 },
216 };
217
218 /*
219 * Connected is a portrait Sharp-QVGA display
220 * of type: LQ035Q7DB02
221 */
222 static struct imx_fb_videomode mx21ads_modes[] = {
223 {
224 .mode = {
225 .name = "Sharp-LQ035Q7",
226 .refresh = 60,
227 .xres = 240,
228 .yres = 320,
229 .pixclock = 188679, /* in ps (5.3MHz) */
230 .hsync_len = 2,
231 .left_margin = 6,
232 .right_margin = 16,
233 .vsync_len = 1,
234 .upper_margin = 8,
235 .lower_margin = 10,
236 },
237 .pcr = 0xfb108bc7,
238 .bpp = 16,
239 },
240 };
241
242 static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
243 .mode = mx21ads_modes,
244 .num_modes = ARRAY_SIZE(mx21ads_modes),
245
246 .pwmr = 0x00a903ff,
247 .lscr1 = 0x00120300,
248 .dmacr = 0x00020008,
249 };
250
mx21ads_sdhc_get_ro(struct device * dev)251 static int mx21ads_sdhc_get_ro(struct device *dev)
252 {
253 return gpio_get_value(MX21ADS_IO_SD_WP);
254 }
255
mx21ads_sdhc_init(struct device * dev,irq_handler_t detect_irq,void * data)256 static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
257 void *data)
258 {
259 int ret;
260
261 ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
262 if (ret)
263 return ret;
264
265 return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
266 IRQF_TRIGGER_FALLING, "mmc-detect", data);
267 }
268
mx21ads_sdhc_exit(struct device * dev,void * data)269 static void mx21ads_sdhc_exit(struct device *dev, void *data)
270 {
271 free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
272 gpio_free(MX21ADS_IO_SD_WP);
273 }
274
275 static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
276 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
277 .get_ro = mx21ads_sdhc_get_ro,
278 .init = mx21ads_sdhc_init,
279 .exit = mx21ads_sdhc_exit,
280 };
281
282 static const struct mxc_nand_platform_data
283 mx21ads_nand_board_info __initconst = {
284 .width = 1,
285 .hw_ecc = 1,
286 };
287
288 static struct platform_device *platform_devices[] __initdata = {
289 &mx21ads_mmgpio,
290 &mx21ads_lcd_regulator,
291 &mx21ads_nor_mtd_device,
292 };
293
mx21ads_board_init(void)294 static void __init mx21ads_board_init(void)
295 {
296 imx21_soc_init();
297
298 mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
299 "mx21ads");
300
301 imx21_add_imx_uart0(&uart_pdata_rts);
302 imx21_add_imx_uart2(&uart_pdata_norts);
303 imx21_add_imx_uart3(&uart_pdata_rts);
304 imx21_add_mxc_nand(&mx21ads_nand_board_info);
305
306 imx21_add_imx_fb(&mx21ads_fb_data);
307 }
308
mx21ads_late_init(void)309 static void __init mx21ads_late_init(void)
310 {
311 imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
312
313 gpiod_add_lookup_table(&mx21ads_lcd_regulator_gpiod_table);
314 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
315
316 mx21ads_cs8900_resources[1].start =
317 gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
318 mx21ads_cs8900_resources[1].end =
319 gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
320 platform_device_register_full(&mx21ads_cs8900_devinfo);
321 }
322
mx21ads_timer_init(void)323 static void __init mx21ads_timer_init(void)
324 {
325 mx21_clocks_init(32768, 26000000);
326 }
327
328 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
329 /* maintainer: Freescale Semiconductor, Inc. */
330 .atag_offset = 0x100,
331 .map_io = mx21_map_io,
332 .init_early = imx21_init_early,
333 .init_irq = mx21_init_irq,
334 .init_time = mx21ads_timer_init,
335 .init_machine = mx21ads_board_init,
336 .init_late = mx21ads_late_init,
337 .restart = mxc_restart,
338 MACHINE_END
339
