1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
4 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
5 */
6
7 #include <linux/platform_device.h>
8 #include <linux/io.h>
9 #include <linux/i2c.h>
10 #include <linux/property.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/spi/spi.h>
13 #include <linux/spi/eeprom.h>
14 #include <linux/irq.h>
15 #include <linux/delay.h>
16 #include <linux/gpio.h>
17 #include <linux/usb/otg.h>
18 #include <linux/usb/ulpi.h>
19
20 #include <asm/mach/arch.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/time.h>
23
24 #include "common.h"
25 #include "devices-imx27.h"
26 #include "ehci.h"
27 #include "hardware.h"
28 #include "iomux-mx27.h"
29 #include "ulpi.h"
30
31 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
32 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
33 #define SPI1_SS0 (GPIO_PORTD + 28)
34 #define SPI1_SS1 (GPIO_PORTD + 27)
35 #define SD2_CD (GPIO_PORTC + 29)
36
37 static const int pca100_pins[] __initconst = {
38 /* UART1 */
39 PE12_PF_UART1_TXD,
40 PE13_PF_UART1_RXD,
41 PE14_PF_UART1_CTS,
42 PE15_PF_UART1_RTS,
43 /* SDHC */
44 PB4_PF_SD2_D0,
45 PB5_PF_SD2_D1,
46 PB6_PF_SD2_D2,
47 PB7_PF_SD2_D3,
48 PB8_PF_SD2_CMD,
49 PB9_PF_SD2_CLK,
50 SD2_CD | GPIO_GPIO | GPIO_IN,
51 /* FEC */
52 PD0_AIN_FEC_TXD0,
53 PD1_AIN_FEC_TXD1,
54 PD2_AIN_FEC_TXD2,
55 PD3_AIN_FEC_TXD3,
56 PD4_AOUT_FEC_RX_ER,
57 PD5_AOUT_FEC_RXD1,
58 PD6_AOUT_FEC_RXD2,
59 PD7_AOUT_FEC_RXD3,
60 PD8_AF_FEC_MDIO,
61 PD9_AIN_FEC_MDC,
62 PD10_AOUT_FEC_CRS,
63 PD11_AOUT_FEC_TX_CLK,
64 PD12_AOUT_FEC_RXD0,
65 PD13_AOUT_FEC_RX_DV,
66 PD14_AOUT_FEC_RX_CLK,
67 PD15_AOUT_FEC_COL,
68 PD16_AIN_FEC_TX_ER,
69 PF23_AIN_FEC_TX_EN,
70 /* SSI1 */
71 PC20_PF_SSI1_FS,
72 PC21_PF_SSI1_RXD,
73 PC22_PF_SSI1_TXD,
74 PC23_PF_SSI1_CLK,
75 /* onboard I2C */
76 PC5_PF_I2C2_SDA,
77 PC6_PF_I2C2_SCL,
78 /* external I2C */
79 PD17_PF_I2C_DATA,
80 PD18_PF_I2C_CLK,
81 /* SPI1 */
82 PD25_PF_CSPI1_RDY,
83 PD29_PF_CSPI1_SCLK,
84 PD30_PF_CSPI1_MISO,
85 PD31_PF_CSPI1_MOSI,
86 /* OTG */
87 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
88 PC7_PF_USBOTG_DATA5,
89 PC8_PF_USBOTG_DATA6,
90 PC9_PF_USBOTG_DATA0,
91 PC10_PF_USBOTG_DATA2,
92 PC11_PF_USBOTG_DATA1,
93 PC12_PF_USBOTG_DATA4,
94 PC13_PF_USBOTG_DATA3,
95 PE0_PF_USBOTG_NXT,
96 PE1_PF_USBOTG_STP,
97 PE2_PF_USBOTG_DIR,
98 PE24_PF_USBOTG_CLK,
99 PE25_PF_USBOTG_DATA7,
100 /* USBH2 */
101 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
102 PA0_PF_USBH2_CLK,
103 PA1_PF_USBH2_DIR,
104 PA2_PF_USBH2_DATA7,
105 PA3_PF_USBH2_NXT,
106 PA4_PF_USBH2_STP,
107 PD19_AF_USBH2_DATA4,
108 PD20_AF_USBH2_DATA3,
109 PD21_AF_USBH2_DATA6,
110 PD22_AF_USBH2_DATA0,
111 PD23_AF_USBH2_DATA2,
112 PD24_AF_USBH2_DATA1,
113 PD26_AF_USBH2_DATA5,
114 /* display */
115 PA5_PF_LSCLK,
116 PA6_PF_LD0,
117 PA7_PF_LD1,
118 PA8_PF_LD2,
119 PA9_PF_LD3,
120 PA10_PF_LD4,
121 PA11_PF_LD5,
122 PA12_PF_LD6,
123 PA13_PF_LD7,
124 PA14_PF_LD8,
125 PA15_PF_LD9,
126 PA16_PF_LD10,
127 PA17_PF_LD11,
128 PA18_PF_LD12,
129 PA19_PF_LD13,
130 PA20_PF_LD14,
131 PA21_PF_LD15,
132 PA22_PF_LD16,
133 PA23_PF_LD17,
134 PA26_PF_PS,
135 PA28_PF_HSYNC,
136 PA29_PF_VSYNC,
137 PA31_PF_OE_ACD,
138 /* free GPIO */
139 GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
140 GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
141 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
142 };
143
144 static const struct imxuart_platform_data uart_pdata __initconst = {
145 .flags = IMXUART_HAVE_RTSCTS,
146 };
147
148 static const struct mxc_nand_platform_data
149 pca100_nand_board_info __initconst = {
150 .width = 1,
151 .hw_ecc = 1,
152 };
153
154 static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
155 .bitrate = 100000,
156 };
157
158 static const struct property_entry board_eeprom_properties[] = {
159 PROPERTY_ENTRY_U32("pagesize", 32),
160 { }
161 };
162
163 static struct i2c_board_info pca100_i2c_devices[] = {
164 {
165 I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
166 .properties = board_eeprom_properties,
167 }, {
168 I2C_BOARD_INFO("pcf8563", 0x51),
169 }, {
170 I2C_BOARD_INFO("lm75", 0x4a),
171 }
172 };
173
174 static struct spi_eeprom at25320 = {
175 .name = "at25320an",
176 .byte_len = 4096,
177 .page_size = 32,
178 .flags = EE_ADDR2,
179 };
180
181 static struct spi_board_info pca100_spi_board_info[] __initdata = {
182 {
183 .modalias = "at25",
184 .max_speed_hz = 30000,
185 .bus_num = 0,
186 .chip_select = 1,
187 .platform_data = &at25320,
188 },
189 };
190
191 static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
192
193 static const struct spi_imx_master pca100_spi0_data __initconst = {
194 .chipselect = pca100_spi_cs,
195 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
196 };
197
pca100_ac97_warm_reset(struct snd_ac97 * ac97)198 static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
199 {
200 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
201 gpio_set_value(GPIO_PORTC + 20, 1);
202 udelay(2);
203 gpio_set_value(GPIO_PORTC + 20, 0);
204 mxc_gpio_mode(PC20_PF_SSI1_FS);
205 msleep(2);
206 }
207
pca100_ac97_cold_reset(struct snd_ac97 * ac97)208 static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
209 {
210 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
211 gpio_set_value(GPIO_PORTC + 20, 0);
212 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
213 gpio_set_value(GPIO_PORTC + 22, 0);
214 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
215 gpio_set_value(GPIO_PORTC + 28, 0);
216 udelay(10);
217 gpio_set_value(GPIO_PORTC + 28, 1);
218 mxc_gpio_mode(PC20_PF_SSI1_FS);
219 mxc_gpio_mode(PC22_PF_SSI1_TXD);
220 msleep(2);
221 }
222
223 static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
224 .ac97_reset = pca100_ac97_cold_reset,
225 .ac97_warm_reset = pca100_ac97_warm_reset,
226 .flags = IMX_SSI_USE_AC97,
227 };
228
pca100_sdhc2_init(struct device * dev,irq_handler_t detect_irq,void * data)229 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
230 void *data)
231 {
232 int ret;
233
234 ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
235 IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
236 if (ret)
237 printk(KERN_ERR
238 "pca100: Failed to request irq for sd/mmc detection\n");
239
240 return ret;
241 }
242
pca100_sdhc2_exit(struct device * dev,void * data)243 static void pca100_sdhc2_exit(struct device *dev, void *data)
244 {
245 free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
246 }
247
248 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
249 .init = pca100_sdhc2_init,
250 .exit = pca100_sdhc2_exit,
251 };
252
otg_phy_init(struct platform_device * pdev)253 static int otg_phy_init(struct platform_device *pdev)
254 {
255 gpio_set_value(OTG_PHY_CS_GPIO, 0);
256
257 mdelay(10);
258
259 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
260 }
261
262 static struct mxc_usbh_platform_data otg_pdata __initdata = {
263 .init = otg_phy_init,
264 .portsc = MXC_EHCI_MODE_ULPI,
265 };
266
usbh2_phy_init(struct platform_device * pdev)267 static int usbh2_phy_init(struct platform_device *pdev)
268 {
269 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
270
271 mdelay(10);
272
273 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
274 }
275
276 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
277 .init = usbh2_phy_init,
278 .portsc = MXC_EHCI_MODE_ULPI,
279 };
280
281 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
282 .operating_mode = FSL_USB2_DR_DEVICE,
283 .phy_mode = FSL_USB2_PHY_ULPI,
284 };
285
286 static bool otg_mode_host __initdata;
287
pca100_otg_mode(char * options)288 static int __init pca100_otg_mode(char *options)
289 {
290 if (!strcmp(options, "host"))
291 otg_mode_host = true;
292 else if (!strcmp(options, "device"))
293 otg_mode_host = false;
294 else
295 pr_info("otg_mode neither \"host\" nor \"device\". "
296 "Defaulting to device\n");
297 return 1;
298 }
299 __setup("otg_mode=", pca100_otg_mode);
300
301 /* framebuffer info */
302 static struct imx_fb_videomode pca100_fb_modes[] = {
303 {
304 .mode = {
305 .name = "EMERGING-ETV570G0DHU",
306 .refresh = 60,
307 .xres = 640,
308 .yres = 480,
309 .pixclock = 39722, /* in ps (25.175 MHz) */
310 .hsync_len = 30,
311 .left_margin = 114,
312 .right_margin = 16,
313 .vsync_len = 3,
314 .upper_margin = 32,
315 .lower_margin = 0,
316 },
317 /*
318 * TFT
319 * Pixel pol active high
320 * HSYNC active low
321 * VSYNC active low
322 * use HSYNC for ACD count
323 * line clock disable while idle
324 * always enable line clock even if no data
325 */
326 .pcr = 0xf0c08080,
327 .bpp = 16,
328 },
329 };
330
331 static const struct imx_fb_platform_data pca100_fb_data __initconst = {
332 .mode = pca100_fb_modes,
333 .num_modes = ARRAY_SIZE(pca100_fb_modes),
334
335 .pwmr = 0x00A903FF,
336 .lscr1 = 0x00120300,
337 .dmacr = 0x00020010,
338 };
339
pca100_init(void)340 static void __init pca100_init(void)
341 {
342 int ret;
343
344 imx27_soc_init();
345
346 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
347 ARRAY_SIZE(pca100_pins), "PCA100");
348 if (ret)
349 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
350
351 imx27_add_imx_uart0(&uart_pdata);
352
353 imx27_add_mxc_nand(&pca100_nand_board_info);
354
355 /* only the i2c master 1 is used on this CPU card */
356 i2c_register_board_info(1, pca100_i2c_devices,
357 ARRAY_SIZE(pca100_i2c_devices));
358
359 imx27_add_imx_i2c(1, &pca100_i2c1_data);
360
361 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
362 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
363 spi_register_board_info(pca100_spi_board_info,
364 ARRAY_SIZE(pca100_spi_board_info));
365 imx27_add_spi_imx0(&pca100_spi0_data);
366
367 imx27_add_imx_fb(&pca100_fb_data);
368
369 imx27_add_fec(NULL);
370 imx27_add_imx2_wdt();
371 imx27_add_mxc_w1();
372 }
373
pca100_late_init(void)374 static void __init pca100_late_init(void)
375 {
376 imx27_add_imx_ssi(0, &pca100_ssi_pdata);
377
378 imx27_add_mxc_mmc(1, &sdhc_pdata);
379
380 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
381 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
382 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
383 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
384
385 if (otg_mode_host) {
386 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
387 ULPI_OTG_DRVVBUS_EXT);
388
389 if (otg_pdata.otg)
390 imx27_add_mxc_ehci_otg(&otg_pdata);
391 } else {
392 gpio_set_value(OTG_PHY_CS_GPIO, 0);
393 imx27_add_fsl_usb2_udc(&otg_device_pdata);
394 }
395
396 usbh2_pdata.otg = imx_otg_ulpi_create(
397 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
398
399 if (usbh2_pdata.otg)
400 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
401 }
402
pca100_timer_init(void)403 static void __init pca100_timer_init(void)
404 {
405 mx27_clocks_init(26000000);
406 }
407
408 MACHINE_START(PCA100, "phyCARD-i.MX27")
409 .atag_offset = 0x100,
410 .map_io = mx27_map_io,
411 .init_early = imx27_init_early,
412 .init_irq = mx27_init_irq,
413 .init_machine = pca100_init,
414 .init_late = pca100_late_init,
415 .init_time = pca100_timer_init,
416 .restart = mxc_restart,
417 MACHINE_END
418
