| /Linux-v5.4/drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 59 cdclk_state->cdclk = 133333; in fixed_133mhz_get_cdclk()
65 cdclk_state->cdclk = 200000; in fixed_200mhz_get_cdclk()
71 cdclk_state->cdclk = 266667; in fixed_266mhz_get_cdclk()
77 cdclk_state->cdclk = 333333; in fixed_333mhz_get_cdclk()
83 cdclk_state->cdclk = 400000; in fixed_400mhz_get_cdclk()
89 cdclk_state->cdclk = 450000; in fixed_450mhz_get_cdclk()
104 cdclk_state->cdclk = 133333; in i85x_get_cdclk()
118 cdclk_state->cdclk = 200000; in i85x_get_cdclk()
121 cdclk_state->cdclk = 250000; in i85x_get_cdclk()
124 cdclk_state->cdclk = 133333; in i85x_get_cdclk()
[all …]
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| D | intel_audio.c | 815 to_intel_atomic_state(state)->cdclk.force_min_cdclk_changed = true; in glk_force_audio_cdclk()
816 to_intel_atomic_state(state)->cdclk.force_min_cdclk = in glk_force_audio_cdclk()
913 return dev_priv->cdclk.hw.cdclk; in i915_audio_component_get_cdclk_freq()
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| D | intel_display.c | 7356 crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100) in hsw_compute_ips_config()
13472 if (!state->cdclk.force_min_cdclk_changed) in intel_modeset_checks()
13473 state->cdclk.force_min_cdclk = dev_priv->cdclk.force_min_cdclk; in intel_modeset_checks()
13477 state->cdclk.logical = dev_priv->cdclk.logical; in intel_modeset_checks()
13478 state->cdclk.actual = dev_priv->cdclk.actual; in intel_modeset_checks()
13479 state->cdclk.pipe = INVALID_PIPE; in intel_modeset_checks()
13511 if (intel_cdclk_changed(&dev_priv->cdclk.logical, in intel_modeset_checks()
13512 &state->cdclk.logical)) { in intel_modeset_checks()
13534 &dev_priv->cdclk.actual, in intel_modeset_checks()
13535 &state->cdclk.actual)) { in intel_modeset_checks()
[all …]
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| D | intel_fbc.c | 771 cache->crtc.hsw_bdw_pixel_rate >= dev_priv->cdclk.hw.cdclk * 95 / 100) { in intel_fbc_can_activate()
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| D | intel_panel.c | 1463 clock = KHz(dev_priv->cdclk.hw.cdclk); in i9xx_hz_to_pwm()
1481 clock = KHz(dev_priv->cdclk.hw.cdclk); in i965_hz_to_pwm()
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| D | intel_dpll_mgr.c | 2259 int ref_clock = dev_priv->cdclk.hw.ref; in cnl_hdmi_pll_ref_clock()
2543 dev_priv->cdclk.hw.ref == 24000 ? in icl_calc_dp_combo_pll()
2565 *pll_params = dev_priv->cdclk.hw.ref == 24000 ? in icl_calc_tbt_pll()
2701 int refclk_khz = dev_priv->cdclk.hw.ref; in icl_calc_mg_pll_state()
3087 if (dev_priv->cdclk.hw.ref == 38400) { in mg_pll_get_hw_state()
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| D | intel_display_types.h | 472 } cdclk; member
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| D | intel_display_power.c | 974 WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state)); in gen9_disable_dc_states()
4401 intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); in hsw_restore_lcpll()
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| D | intel_dp.c | 1192 return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000); in ilk_get_aux_clock_divider()
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| D | intel_ddi.c | 1414 ref_clock = dev_priv->cdclk.hw.ref; in icl_calc_mg_pll_link()
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| /Linux-v5.4/drivers/clk/samsung/ |
| D | clk-s5pv210-audss.c | 71 struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; in s5pv210_audss_clk_probe() local
109 cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); in s5pv210_audss_clk_probe()
123 if (!IS_ERR(cdclk)) in s5pv210_audss_clk_probe()
124 mout_i2s_p[1] = __clk_get_name(cdclk); in s5pv210_audss_clk_probe()
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| D | clk-exynos-audss.c | 129 struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; in exynos_audss_clk_probe() local
191 cdclk = devm_clk_get(dev, "cdclk"); in exynos_audss_clk_probe()
193 if (!IS_ERR(cdclk)) in exynos_audss_clk_probe()
194 mout_i2s_p[1] = __clk_get_name(cdclk); in exynos_audss_clk_probe()
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | clk-exynos-audss.txt | 26 - cdclk: External i2s clock, parent of mout_i2s. "cdclk0" is used if not
34 "pll_in", "cdclk", "sclk_audio", and "sclk_pcm_in" respectively.
82 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in", "cdclk";
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | s3c64xx-pinctrl.dtsi | 334 i2s0_cdclk: i2s0-cdclk {
346 i2s1_cdclk: i2s1-cdclk {
360 i2s2_cdclk: i2s2-cdclk {
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| /Linux-v5.4/drivers/gpu/drm/i915/ |
| D | i915_drv.h | 1278 unsigned int cdclk, vco, ref, bypass; member
1420 } cdclk; member
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| D | intel_pm.c | 2809 if (WARN_ON(intel_state->cdclk.logical.cdclk == 0)) in hsw_compute_linetime_wm()
2818 intel_state->cdclk.logical.cdclk); in hsw_compute_linetime_wm()
4186 dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk; in skl_check_pipe_max_pixel_rate()
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| D | i915_debugfs.c | 987 seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk); in i915_frequency_info()
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