7356 	    crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100)  in hsw_compute_ips_config()
13472 	if (!state->cdclk.force_min_cdclk_changed)  in intel_modeset_checks()
13473 		state->cdclk.force_min_cdclk = dev_priv->cdclk.force_min_cdclk;  in intel_modeset_checks()
13477 	state->cdclk.logical = dev_priv->cdclk.logical;  in intel_modeset_checks()
13478 	state->cdclk.actual = dev_priv->cdclk.actual;  in intel_modeset_checks()
13479 	state->cdclk.pipe = INVALID_PIPE;  in intel_modeset_checks()
13511 		if (intel_cdclk_changed(&dev_priv->cdclk.logical,  in intel_modeset_checks()
13512 					&state->cdclk.logical)) {  in intel_modeset_checks()
13534 						  &dev_priv->cdclk.actual,  in intel_modeset_checks()
13535 						  &state->cdclk.actual)) {  in intel_modeset_checks()
13540 			state->cdclk.pipe = pipe;  in intel_modeset_checks()
13541 		} else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,  in intel_modeset_checks()
13542 						     &state->cdclk.actual)) {  in intel_modeset_checks()
13547 			state->cdclk.pipe = INVALID_PIPE;  in intel_modeset_checks()
13551 			      state->cdclk.logical.cdclk,  in intel_modeset_checks()
13552 			      state->cdclk.actual.cdclk);  in intel_modeset_checks()
13554 			      state->cdclk.logical.voltage_level,  in intel_modeset_checks()
13555 			      state->cdclk.actual.voltage_level);  in intel_modeset_checks()
13619 	bool any_ms = state->cdclk.force_min_cdclk_changed;  in intel_atomic_check()
13662 		state->cdclk.logical = dev_priv->cdclk.logical;  in intel_atomic_check()
13988 						 &state->cdclk.actual,  in intel_atomic_commit_tail()
13989 						 &dev_priv->cdclk.actual,  in intel_atomic_commit_tail()
13990 						 state->cdclk.pipe);  in intel_atomic_commit_tail()
14026 						  &state->cdclk.actual,  in intel_atomic_commit_tail()
14027 						  &dev_priv->cdclk.actual,  in intel_atomic_commit_tail()
14028 						  state->cdclk.pipe);  in intel_atomic_commit_tail()
14222 		dev_priv->cdclk.force_min_cdclk = state->cdclk.force_min_cdclk;  in intel_atomic_commit()
14510 	max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk;  in skl_max_scale()
15967 	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");  in intel_modeset_init_hw()
15968 	dev_priv->cdclk.logical = dev_priv->cdclk.actual = dev_priv->cdclk.hw;  in intel_modeset_init_hw()