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/Linux-v5.4/Documentation/devicetree/bindings/media/
Dfsl-pxp.txt1 Freescale Pixel Pipeline
4 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
Dnvidia,tegra-vde.txt50 0x6001c800 0x100 /* Pixel prediction block */
/Linux-v5.4/arch/arm/mach-pxa/include/mach/
Dregs-lcd.h90 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) argument
/Linux-v5.4/Documentation/devicetree/bindings/display/exynos/
Dexynos_hdmi.txt25 c) sclk_pixel: Pixel special clock, one of the two possible inputs of
48 j) pixel_clko: Pixel clock generated by HDMI-PHY.
/Linux-v5.4/drivers/video/fbdev/mbx/
Dreg_bits.h194 #define Gsctrl_Width(Pixel) /* Display Width [1..2048 pix.] */ \ argument
195 (((Pixel) - 1) << FShft(GSCTRL_GSWIDTH))
198 #define Gsctrl_Height(Pixel) /* Display Height [1..2048 pix.] */ \ argument
199 (((Pixel) - 1) << FShft(GSCTRL_GSHEIGHT))
/Linux-v5.4/Documentation/devicetree/bindings/media/i2c/
Dmt9p031.txt14 - pixel-clock-frequency: Pixel clock frequency.
Dadv7604.txt55 - pclk-sample: Pixel clock polarity. Defaults to output on the falling edge.
/Linux-v5.4/Documentation/gpu/
Dvc4.rst15 Pixel Valve (DRM CRTC)
/Linux-v5.4/Documentation/media/uapi/v4l/
Dext-ctrls-image-process.rst46 Pixel rate in the source pads of the subdev. This control is
Dvidioc-enum-frameintervals.rst146 - IN: Pixel format for which the frame intervals are enumerated.
Dvidioc-enum-framesizes.rst163 - IN: Pixel format for which the frame sizes are enumerated.
Dext-ctrls-dv.rst116 - Graphics content. Pixel data should be passed unfiltered and
Dv4l2.rst401 Pixel format erratum.
Dvidioc-g-dv-timings.rst114 - Pixel clock in Hz. Ex. 74.25MHz->74250000
/Linux-v5.4/drivers/platform/chrome/
DKconfig161 tristate "Chromebook Pixel's lightbar support"
165 This option exposes the Chromebook Pixel's lightbar to
/Linux-v5.4/Documentation/ABI/testing/
Dsysfs-class-chromeos-driver-cros-ec-lightbar55 The Pixel lightbar has a number of built-in sequences
/Linux-v5.4/Documentation/fb/
Dep93xx-fb.rst20 /* Pixel clock, porches, etc */
Dpxafb.rst33 Pixel clock in picoseconds
Dapi.rst124 Pixel values are encoded as indices into a colormap that stores red, green and
268 Pixel values are bits_per_pixel wide and are split in non-overlapping red,
/Linux-v5.4/Documentation/devicetree/bindings/display/
Dbrcm,bcm-vc4.txt10 Required properties for Pixel Valve:
/Linux-v5.4/arch/arm/mach-sa1100/include/mach/
DSA-1100.h1713 #define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ argument
1714 (((Pixel) - 16)/16 << FShft (LCCR1_PPL))
/Linux-v5.4/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,disp.txt6 and input selectors in the MMSYS_CONFIG register space. Pixel clock and start
/Linux-v5.4/Documentation/media/v4l-drivers/
Dqcom_camss.rst39 hardware blocks. The VFE has different input interfaces. The PIX (Pixel) input
/Linux-v5.4/Documentation/devicetree/bindings/display/msm/
Ddsi.txt26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
/Linux-v5.4/drivers/media/platform/
DKconfig193 tristate "i.MX Pixel Pipeline (PXP)"
198 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,

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