1.. Permission is granted to copy, distribute and/or modify this 2.. document under the terms of the GNU Free Documentation License, 3.. Version 1.1 or any later version published by the Free Software 4.. Foundation, with no Invariant Sections, no Front-Cover Texts 5.. and no Back-Cover Texts. A copy of the license is included at 6.. Documentation/media/uapi/fdl-appendix.rst. 7.. 8.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections 9 10.. _image-process-controls: 11 12******************************* 13Image Process Control Reference 14******************************* 15 16The Image Process control class is intended for low-level control of 17image processing functions. Unlike ``V4L2_CID_IMAGE_SOURCE_CLASS``, the 18controls in this class affect processing the image, and do not control 19capturing of it. 20 21 22.. _image-process-control-id: 23 24Image Process Control IDs 25========================= 26 27``V4L2_CID_IMAGE_PROC_CLASS (class)`` 28 The IMAGE_PROC class descriptor. 29 30``V4L2_CID_LINK_FREQ (integer menu)`` 31 Data bus frequency. Together with the media bus pixel code, bus type 32 (clock cycles per sample), the data bus frequency defines the pixel 33 rate (``V4L2_CID_PIXEL_RATE``) in the pixel array (or possibly 34 elsewhere, if the device is not an image sensor). The frame rate can 35 be calculated from the pixel clock, image width and height and 36 horizontal and vertical blanking. While the pixel rate control may 37 be defined elsewhere than in the subdev containing the pixel array, 38 the frame rate cannot be obtained from that information. This is 39 because only on the pixel array it can be assumed that the vertical 40 and horizontal blanking information is exact: no other blanking is 41 allowed in the pixel array. The selection of frame rate is performed 42 by selecting the desired horizontal and vertical blanking. The unit 43 of this control is Hz. 44 45``V4L2_CID_PIXEL_RATE (64-bit integer)`` 46 Pixel rate in the source pads of the subdev. This control is 47 read-only and its unit is pixels / second. 48 49``V4L2_CID_TEST_PATTERN (menu)`` 50 Some capture/display/sensor devices have the capability to generate 51 test pattern images. These hardware specific test patterns can be 52 used to test if a device is working properly. 53 54``V4L2_CID_DEINTERLACING_MODE (menu)`` 55 The video deinterlacing mode (such as Bob, Weave, ...). The menu items are 56 driver specific and are documented in :ref:`v4l-drivers`. 57 58``V4L2_CID_DIGITAL_GAIN (integer)`` 59 Digital gain is the value by which all colour components 60 are multiplied by. Typically the digital gain applied is the 61 control value divided by e.g. 0x100, meaning that to get no 62 digital gain the control value needs to be 0x100. The no-gain 63 configuration is also typically the default. 64