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Searched refs:NUM_FCLK_DPM_LEVELS (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dsmu10_driver_if.h101 #define NUM_FCLK_DPM_LEVELS 4 macro
112 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];
Dsmu12_driver_if.h107 #define NUM_FCLK_DPM_LEVELS 4 macro
119 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];
Dsmu11_driver_if_arcturus.h40 #define NUM_FCLK_DPM_LEVELS 8 macro
50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
504 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
Dsmu11_driver_if.h43 #define NUM_FCLK_DPM_LEVELS 8 macro
58 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
425 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ];
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Drenoir_ppt.c172 *clock = table->FClocks[NUM_FCLK_DPM_LEVELS-1].Freq; in renoir_get_dpm_uclk_limited()
233 count = NUM_FCLK_DPM_LEVELS; in renoir_print_clk_levels()
Darcturus_ppt.c1652 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) in arcturus_dump_pptable()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu10_hwmgr.c458 NUM_FCLK_DPM_LEVELS, in smu10_populate_clock_table()
Dvega20_processpptables.c337 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
Dvega20_hwmgr.c3512 PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_FCLK_DPM_LEVELS, in vega20_set_fclk_to_highest_dpm_level()