| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_nbio.h | 52 u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
53 u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
54 u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
55 u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
56 u32 (*get_rev_id)(struct amdgpu_device *adev);
57 void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
58 void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
59 u32 (*get_memsize)(struct amdgpu_device *adev);
60 void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
62 void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell,
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| D | amdgpu_atombios.h | 136 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
139 struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
141 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
143 bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev);
145 bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
151 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
153 bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
157 int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev,
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| D | amdgpu_mmhub.h | 25 void (*ras_init)(struct amdgpu_device *adev);
26 int (*ras_late_init)(struct amdgpu_device *adev);
27 void (*query_ras_error_count)(struct amdgpu_device *adev,
29 void (*reset_ras_error_count)(struct amdgpu_device *adev);
30 u64 (*get_fb_location)(struct amdgpu_device *adev);
31 void (*init)(struct amdgpu_device *adev);
32 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*set_fault_enable_default)(struct amdgpu_device *adev,
35 void (*gart_disable)(struct amdgpu_device *adev);
36 int (*set_clockgating)(struct amdgpu_device *adev,
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| D | amdgpu_rlc.h | 118 bool (*is_rlc_enabled)(struct amdgpu_device *adev);
119 void (*set_safe_mode)(struct amdgpu_device *adev);
120 void (*unset_safe_mode)(struct amdgpu_device *adev);
121 int (*init)(struct amdgpu_device *adev);
122 u32 (*get_csb_size)(struct amdgpu_device *adev);
123 void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer);
124 int (*get_cp_table_num)(struct amdgpu_device *adev);
125 int (*resume)(struct amdgpu_device *adev);
126 void (*stop)(struct amdgpu_device *adev);
127 void (*reset)(struct amdgpu_device *adev);
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| D | amdgpu_xgmi.h | 38 struct amdgpu_device *hi_req_gpu;
53 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev);
55 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
56 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
57 int amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
58 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
59 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
60 struct amdgpu_device *peer_adev);
61 int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev);
62 void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev);
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| D | amdgpu.h | 114 struct amdgpu_device *adev;
248 struct amdgpu_device;
296 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
298 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
300 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
329 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
334 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
337 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
343 bool amdgpu_get_bios(struct amdgpu_device *adev);
344 bool amdgpu_read_bios(struct amdgpu_device *adev);
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| D | amdgpu_irq.h | 39 struct amdgpu_device;
73 int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
76 int (*process)(struct amdgpu_device *adev,
102 void amdgpu_irq_disable_all(struct amdgpu_device *adev);
105 int amdgpu_irq_init(struct amdgpu_device *adev);
106 void amdgpu_irq_fini(struct amdgpu_device *adev);
107 int amdgpu_irq_add_id(struct amdgpu_device *adev,
110 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
112 int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
114 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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| D | amdgpu_virt.h | 68 int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
69 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
70 int (*req_init_data)(struct amdgpu_device *adev);
71 int (*reset_gpu)(struct amdgpu_device *adev);
72 int (*wait_reset)(struct amdgpu_device *adev);
73 void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3);
260 bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev);
261 void amdgpu_virt_init_setting(struct amdgpu_device *adev);
262 void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev,
265 int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
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| D | amdgpu_gfx.h | 203 uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);
204 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num,
206 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd,
208 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd,
211 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
214 void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
216 int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
217 int (*query_ras_error_count) (struct amdgpu_device *adev, void *ras_error_status);
218 void (*reset_ras_error_count) (struct amdgpu_device *adev);
219 void (*init_spm_golden)(struct amdgpu_device *adev);
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| D | amdgpu_amdkfd.c | 69 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
96 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
116 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
176 void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini()
184 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
191 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm) in amdgpu_amdkfd_suspend()
197 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm) in amdgpu_amdkfd_resume()
207 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_pre_reset()
217 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_post_reset()
229 struct amdgpu_device *adev = (struct amdgpu_device *)kgd; in amdgpu_amdkfd_gpu_reset()
[all …]
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| D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
38 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
39 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
40 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
42 void (*get_clockgating_state)(struct amdgpu_device *adev,
44 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
46 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
48 int (*pmc_stop)(struct amdgpu_device *adev, uint64_t config,
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| D | si_ih.c | 33 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
35 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
47 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
62 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
101 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
107 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
126 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
147 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
155 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_early_init()
165 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_sw_init()
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| D | cik_ih.c | 51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
169 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
187 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
241 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
272 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
280 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_early_init()
295 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_sw_init()
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| D | tonga_ih.c | 51 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) in tonga_ih_enable_interrupts()
77 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) in tonga_ih_disable_interrupts()
102 static int tonga_ih_irq_init(struct amdgpu_device *adev) in tonga_ih_irq_init()
172 static void tonga_ih_irq_disable(struct amdgpu_device *adev) in tonga_ih_irq_disable()
191 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, in tonga_ih_get_wptr()
222 static void tonga_ih_decode_iv(struct amdgpu_device *adev, in tonga_ih_decode_iv()
253 static void tonga_ih_set_rptr(struct amdgpu_device *adev, in tonga_ih_set_rptr()
267 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_early_init()
282 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_sw_init()
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| D | jpeg_v3_0.c | 37 static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
38 static void jpeg_v3_0_set_irq_funcs(struct amdgpu_device *adev);
51 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_early_init()
74 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_sw_init()
116 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_sw_fini()
136 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_hw_init()
161 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_hw_fini()
183 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_suspend()
204 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_resume()
216 static void jpeg_v3_0_disable_clock_gating(struct amdgpu_device* adev) in jpeg_v3_0_disable_clock_gating()
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| D | vce_v2_0.c | 45 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
46 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
57 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
91 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
99 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
116 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
142 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
147 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
168 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
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| D | iceland_ih.c | 51 static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) in iceland_ih_enable_interrupts()
79 static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) in iceland_ih_disable_interrupts()
106 static int iceland_ih_irq_init(struct amdgpu_device *adev) in iceland_ih_irq_init()
170 static void iceland_ih_irq_disable(struct amdgpu_device *adev) in iceland_ih_irq_disable()
189 static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, in iceland_ih_get_wptr()
220 static void iceland_ih_decode_iv(struct amdgpu_device *adev, in iceland_ih_decode_iv()
251 static void iceland_ih_set_rptr(struct amdgpu_device *adev, in iceland_ih_set_rptr()
259 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_early_init()
274 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_sw_init()
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| D | cz_ih.c | 51 static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cz_ih_enable_interrupts(struct amdgpu_device *adev) in cz_ih_enable_interrupts()
79 static void cz_ih_disable_interrupts(struct amdgpu_device *adev) in cz_ih_disable_interrupts()
106 static int cz_ih_irq_init(struct amdgpu_device *adev) in cz_ih_irq_init()
170 static void cz_ih_irq_disable(struct amdgpu_device *adev) in cz_ih_irq_disable()
189 static u32 cz_ih_get_wptr(struct amdgpu_device *adev, in cz_ih_get_wptr()
220 static void cz_ih_decode_iv(struct amdgpu_device *adev, in cz_ih_decode_iv()
251 static void cz_ih_set_rptr(struct amdgpu_device *adev, in cz_ih_set_rptr()
259 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_early_init()
274 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_sw_init()
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| D | amdgpu_ras.h | 333 struct amdgpu_device *adev;
376 typedef int (*ras_ih_cb)(struct amdgpu_device *adev,
402 struct amdgpu_device *adev;
483 static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev, in amdgpu_ras_is_supported()
493 int amdgpu_ras_recovery_init(struct amdgpu_device *adev);
494 int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev,
497 void amdgpu_ras_resume(struct amdgpu_device *adev);
498 void amdgpu_ras_suspend(struct amdgpu_device *adev);
500 unsigned long amdgpu_ras_query_error_count(struct amdgpu_device *adev,
503 bool amdgpu_ras_check_err_threshold(struct amdgpu_device *adev);
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| D | amdgpu_atomfirmware.h | 29 bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev);
30 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
31 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
32 int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
34 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
35 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
36 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
37 bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev);
38 int amdgpu_atomfirmware_get_fw_reserved_fb_size(struct amdgpu_device *adev);
39 int amdgpu_mem_train_support(struct amdgpu_device *adev);
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| D | uvd_v4_2.c | 42 static void uvd_v4_2_mc_resume(struct amdgpu_device *adev);
43 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
44 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev);
45 static int uvd_v4_2_start(struct amdgpu_device *adev);
46 static void uvd_v4_2_stop(struct amdgpu_device *adev);
49 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
60 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_wptr()
88 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_set_wptr()
95 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v4_2_early_init()
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| D | uvd_v5_0.c | 41 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
42 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev);
43 static int uvd_v5_0_start(struct amdgpu_device *adev);
44 static void uvd_v5_0_stop(struct amdgpu_device *adev);
47 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
58 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_rptr()
72 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_wptr()
86 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_set_wptr()
93 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_early_init()
105 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_sw_init()
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| D | mxgpu_nv.c | 34 static void xgpu_nv_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_nv_mailbox_send_ack()
39 static void xgpu_nv_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_nv_mailbox_set_valid()
53 static enum idh_event xgpu_nv_mailbox_peek_msg(struct amdgpu_device *adev) in xgpu_nv_mailbox_peek_msg()
59 static int xgpu_nv_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_nv_mailbox_rcv_msg()
73 static uint8_t xgpu_nv_peek_ack(struct amdgpu_device *adev) in xgpu_nv_peek_ack()
78 static int xgpu_nv_poll_ack(struct amdgpu_device *adev) in xgpu_nv_poll_ack()
97 static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_nv_poll_msg()
114 static void xgpu_nv_mailbox_trans_msg (struct amdgpu_device *adev, in xgpu_nv_mailbox_trans_msg()
149 static int xgpu_nv_send_access_requests(struct amdgpu_device *adev, in xgpu_nv_send_access_requests()
201 static int xgpu_nv_request_reset(struct amdgpu_device *adev) in xgpu_nv_request_reset()
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| D | amdgpu_gart.h | 32 struct amdgpu_device;
58 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
59 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
60 int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
61 void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
62 int amdgpu_gart_init(struct amdgpu_device *adev);
63 void amdgpu_gart_fini(struct amdgpu_device *adev);
64 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
66 int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
69 int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
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| /Linux-v5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_irq.h | 42 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
50 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
66 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
79 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
83 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
85 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
86 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev);
92 int amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
99 int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
100 int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev);
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