Lines Matching refs:amdgpu_device

52 	u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
53 	u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
54 	u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
55 	u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
56 	u32 (*get_rev_id)(struct amdgpu_device *adev);
57 	void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
58 	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
59 	u32 (*get_memsize)(struct amdgpu_device *adev);
60 	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
62 	void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell,
64 	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
66 	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
68 	void (*ih_doorbell_range)(struct amdgpu_device *adev,
70 	void (*enable_doorbell_interrupt)(struct amdgpu_device *adev,
72 	void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
74 	void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
76 	void (*get_clockgating_state)(struct amdgpu_device *adev,
78 	void (*ih_control)(struct amdgpu_device *adev);
79 	void (*init_registers)(struct amdgpu_device *adev);
80 	void (*remap_hdp_registers)(struct amdgpu_device *adev);
81 	void (*handle_ras_controller_intr_no_bifring)(struct amdgpu_device *adev);
82 	void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev);
83 	int (*init_ras_controller_interrupt)(struct amdgpu_device *adev);
84 	int (*init_ras_err_event_athub_interrupt)(struct amdgpu_device *adev);
85 	void (*query_ras_error_count)(struct amdgpu_device *adev,
87 	int (*ras_late_init)(struct amdgpu_device *adev);
98 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev);
99 void amdgpu_nbio_ras_fini(struct amdgpu_device *adev);