Searched refs:CFG_BASE (Results 1 – 9 of 9) sorted by relevance
452 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI; in goya_get_fixed_properties()482 (CFG_BASE - SRAM_BASE_ADDR); in goya_pci_bars_map()911 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_dma_qman()912 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_dma_qman()913 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_dma_qman()914 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_dma_qman()917 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_qman()919 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_qman()960 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_ch()962 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_ch()[all …]
243 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in goya_config_stm()316 base_reg = debug_etf_regs[params->reg_idx] - CFG_BASE; in goya_config_etf()484 base_reg = debug_funnel_regs[params->reg_idx] - CFG_BASE; in goya_config_funnel()505 base_reg = debug_bmon_regs[params->reg_idx] - CFG_BASE; in goya_config_bmon()582 base_reg = debug_spmu_regs[params->reg_idx] - CFG_BASE; in goya_config_spmu()
20 u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; in goya_pb_set_block()
467 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI; in gaudi_get_fixed_properties()493 (CFG_BASE - SPI_FLASH_BASE_ADDR); in gaudi_pci_bars_map()1841 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1843 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1845 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1847 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1849 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1851 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1853 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()1855 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()[all …]
403 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in gaudi_config_stm()431 if ((CFG_BASE + base_reg) >= mmDMA_CH_0_CS_STM_BASE && in gaudi_config_stm()432 (CFG_BASE + base_reg) <= mmDMA_CH_7_CS_STM_BASE) { in gaudi_config_stm()481 base_reg = debug_etf_regs[params->reg_idx] - CFG_BASE; in gaudi_config_etf()689 base_reg = debug_funnel_regs[params->reg_idx] - CFG_BASE; in gaudi_config_funnel()709 base_reg = debug_bmon_regs[params->reg_idx] - CFG_BASE; in gaudi_config_bmon()777 base_reg = debug_spmu_regs[params->reg_idx] - CFG_BASE; in gaudi_config_spmu()
454 u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; in gaudi_pb_set_block()480 WREG32(mmMME0_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()481 WREG32(mmMME1_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()482 WREG32(mmMME2_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()483 WREG32(mmMME3_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()485 WREG32(mmMME0_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()486 WREG32(mmMME2_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_mme_protection_bits()1467 WREG32(mmDMA0_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_dma_protection_bits()1468 WREG32(mmDMA1_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_dma_protection_bits()1469 WREG32(mmDMA2_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0); in gaudi_init_dma_protection_bits()[all …]
52 #define GAUDI_HBM_CFG_BASE (mmHBM0_BASE - CFG_BASE)
18 #define CFG_BASE 0x7FFC000000ull macro
