452 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_get_fixed_properties()
482 			(CFG_BASE - SRAM_BASE_ADDR);  in goya_pci_bars_map()
911 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
912 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
913 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
914 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
917 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
919 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
960 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
962 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
970 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_init_dma_ch()
973 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_init_dma_ch()
1258 	tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE);  in _goya_tpc_mbist_workaround()
1644 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1645 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1646 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1647 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1650 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1652 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1693 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1694 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1695 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1696 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1699 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1701 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1731 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1732 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1751 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1752 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1753 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1754 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1757 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1759 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1800 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1801 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1802 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1803 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1806 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1808 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1841 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
1842 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2252 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_enable_timestamp()
2255 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in goya_enable_timestamp()
2256 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in goya_enable_timestamp()
2259 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in goya_enable_timestamp()
2265 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_disable_timestamp()
3450 	sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_validate_wreg32()
3451 	sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023);  in goya_validate_wreg32()
3996 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);  in goya_add_end_of_cb_packets()
4050 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_read32()
4051 		*val = RREG32(addr - CFG_BASE);  in goya_debugfs_read32()
4106 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_write32()
4107 		WREG32(addr - CFG_BASE, val);  in goya_debugfs_write32()
4147 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in goya_debugfs_read64()
4148 		u32 val_l = RREG32(addr - CFG_BASE);  in goya_debugfs_read64()
4149 		u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE);  in goya_debugfs_read64()
4192 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in goya_debugfs_write64()
4193 		WREG32(addr - CFG_BASE, lower_32_bits(val));  in goya_debugfs_write64()
4194 		WREG32(addr + sizeof(u32) - CFG_BASE, upper_32_bits(val));  in goya_debugfs_write64()
4818 	sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_context_switch()
4822 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_context_switch()