/Linux-v4.19/drivers/net/ethernet/intel/igb/ |
D | igb_ptp.c | 131 wr32(E1000_SYSTIML, ts->tv_nsec); in igb_ptp_write_i210() 132 wr32(E1000_SYSTIMH, (u32)ts->tv_sec); in igb_ptp_write_i210() 210 wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK)); in igb_ptp_adjfreq_82576() 236 wr32(E1000_TIMINCA, inca); in igb_ptp_adjfine_82580() 389 wr32(E1000_TSSDP, tssdp); in igb_pin_extts() 390 wr32(E1000_CTRL, ctrl); in igb_pin_extts() 391 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_extts() 455 wr32(E1000_TSSDP, tssdp); in igb_pin_perout() 456 wr32(E1000_CTRL, ctrl); in igb_pin_perout() 457 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_perout() [all …]
|
D | e1000_82575.c | 202 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_init_phy_params_82575() 504 wr32(E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_I2C_ENA); in igb_set_sfp_media_type_82575() 550 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_set_sfp_media_type_82575() 672 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_get_invariants_82575() 878 wr32(E1000_CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_SDP3_DATA); in igb_get_phy_id_82575() 910 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_get_phy_id_82575() 1066 wr32(E1000_82580_PHY_POWER_MGMT, data); in igb_set_d0_lplu_state_82580() 1110 wr32(E1000_82580_PHY_POWER_MGMT, data); in igb_set_d3_lplu_state_82580() 1194 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_acquire_swfw_sync_82575() 1219 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_release_swfw_sync_82575() [all …]
|
D | e1000_mac.c | 242 wr32(E1000_VLVF(vlvf_index), 0); in igb_vfta_set() 265 wr32(E1000_VLVF(vlvf_index), bits | vlan | E1000_VLVF_VLANID_ENABLE); in igb_vfta_set() 376 wr32(E1000_RAL(index), rar_low); in igb_rar_set() 378 wr32(E1000_RAH(index), rar_high); in igb_rar_set() 684 wr32(E1000_FCT, FLOW_CONTROL_TYPE); in igb_setup_link() 685 wr32(E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in igb_setup_link() 686 wr32(E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igb_setup_link() 688 wr32(E1000_FCTTV, hw->fc.pause_time); in igb_setup_link() 714 wr32(E1000_TCTL, tctl); in igb_config_collision_dist() 748 wr32(E1000_FCRTL, fcrtl); in igb_set_fc_watermarks() [all …]
|
D | igb_main.c | 594 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data() 619 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk() 892 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix() 909 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix() 917 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix() 1150 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability() 1487 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable() 1488 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable() 1490 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable() 1493 wr32(E1000_IAM, 0); in igb_irq_disable() [all …]
|
D | e1000_i210.c | 64 wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI); in igb_get_hw_semaphore_i210() 148 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_acquire_swfw_sync_i210() 172 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_release_swfw_sync_i210() 250 wr32(E1000_SRWR, eewr); in igb_write_nvm_srwr() 678 wr32(E1000_EECD, flup); in igb_update_flash_i210() 836 wr32(E1000_MDICNFG, reg_val); in igb_pll_workaround_i210() 857 wr32(E1000_CTRL, ctrl|E1000_CTRL_PHY_RST); in igb_pll_workaround_i210() 861 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pll_workaround_i210() 863 wr32(E1000_WUC, 0); in igb_pll_workaround_i210() 865 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210() [all …]
|
D | e1000_mbx.c | 248 wr32(E1000_MBVFICR, mask); in igb_check_for_bit_pf() 306 wr32(E1000_VFLRE, BIT(vf_number)); in igb_check_for_rst_pf() 328 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); in igb_obtain_mbx_lock_pf() 356 wr32(E1000_P2VMAILBOX(vf_number), in igb_release_mbx_lock_pf() 391 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS); in igb_write_mbx_pf() 430 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK); in igb_read_mbx_pf() 432 wr32(E1000_P2VMAILBOX(vf_number), in igb_read_mbx_pf()
|
D | e1000_nvm.c | 20 wr32(E1000_EECD, *eecd); in igb_raise_eec_clk() 35 wr32(E1000_EECD, *eecd); in igb_lower_eec_clk() 66 wr32(E1000_EECD, eecd); in igb_shift_out_eec_bits() 78 wr32(E1000_EECD, eecd); in igb_shift_out_eec_bits() 165 wr32(E1000_EECD, eecd | E1000_EECD_REQ); in igb_acquire_nvm() 178 wr32(E1000_EECD, eecd); in igb_acquire_nvm() 200 wr32(E1000_EECD, eecd); in igb_standby_nvm() 204 wr32(E1000_EECD, eecd); in igb_standby_nvm() 242 wr32(E1000_EECD, eecd); in igb_release_nvm() 263 wr32(E1000_EECD, eecd); in igb_ready_nvm_eeprom() [all …]
|
D | igb_ethtool.c | 1208 wr32(reg, (_test[pat] & write)); in reg_pattern_test() 1228 wr32(reg, write & mask); in reg_set_and_check() 1292 wr32(E1000_STATUS, toggle); in igb_reg_test() 1302 wr32(E1000_STATUS, before); in igb_reg_test() 1420 wr32(E1000_IMC, ~0); in igb_intr_test() 1464 wr32(E1000_ICR, ~0); in igb_intr_test() 1466 wr32(E1000_IMC, mask); in igb_intr_test() 1467 wr32(E1000_ICS, mask); in igb_intr_test() 1486 wr32(E1000_ICR, ~0); in igb_intr_test() 1488 wr32(E1000_IMS, mask); in igb_intr_test() [all …]
|
/Linux-v4.19/drivers/net/ethernet/intel/i40evf/ |
D | i40e_adminq.c | 272 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs() 273 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs() 276 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs() 278 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 279 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 301 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs() 302 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs() 305 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs() 307 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() 308 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() [all …]
|
D | i40e_hmc.h | 109 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ 110 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 111 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 128 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ 129 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 130 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 140 wr32((hw), I40E_PFHMC_PDINV, \
|
/Linux-v4.19/drivers/net/ethernet/intel/i40e/ |
D | i40e_hmc.h | 109 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ 110 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 111 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 128 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ 129 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 130 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 140 wr32((hw), I40E_PFHMC_PDINV, \
|
D | i40e_adminq.c | 275 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs() 276 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs() 279 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs() 281 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 282 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 304 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs() 305 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs() 308 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs() 310 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() 311 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() [all …]
|
D | i40e_ptp.c | 68 wr32(hw, I40E_PRTTSYN_TIME_L, ns & 0xFFFFFFFF); in i40e_ptp_write() 69 wr32(hw, I40E_PRTTSYN_TIME_H, ns >> 32); in i40e_ptp_write() 128 wr32(hw, I40E_PRTTSYN_INC_L, adj & 0xFFFFFFFF); in i40e_ptp_adjfreq() 129 wr32(hw, I40E_PRTTSYN_INC_H, adj >> 32); in i40e_ptp_adjfreq() 493 wr32(hw, I40E_PRTTSYN_INC_L, incval & 0xFFFFFFFF); in i40e_ptp_set_increment() 494 wr32(hw, I40E_PRTTSYN_INC_H, incval >> 32); in i40e_ptp_set_increment() 620 wr32(hw, I40E_PRTTSYN_CTL0, regval); in i40e_ptp_set_timestamp_mode() 627 wr32(hw, I40E_PFINT_ICR0_ENA, regval); in i40e_ptp_set_timestamp_mode() 640 wr32(hw, I40E_PRTTSYN_CTL1, regval); in i40e_ptp_set_timestamp_mode() 771 wr32(hw, I40E_PRTTSYN_CTL0, regval); in i40e_ptp_init() [all …]
|
D | i40e_diag.c | 25 wr32(hw, reg, (pat & mask)); in i40e_diag_reg_pattern_test() 35 wr32(hw, reg, orig_val); in i40e_diag_reg_pattern_test()
|
D | i40e_lan_hmc.c | 486 wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id), in i40e_configure_lan_hmc() 488 wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt); in i40e_configure_lan_hmc() 492 wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id), in i40e_configure_lan_hmc() 494 wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt); in i40e_configure_lan_hmc() 498 wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id), in i40e_configure_lan_hmc() 500 wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt); in i40e_configure_lan_hmc() 504 wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id), in i40e_configure_lan_hmc() 506 wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt); in i40e_configure_lan_hmc()
|
/Linux-v4.19/drivers/net/ethernet/intel/ice/ |
D | ice_controlq.c | 316 wr32(hw, cq->sq.head, 0); in ice_cfg_sq_regs() 317 wr32(hw, cq->sq.tail, 0); in ice_cfg_sq_regs() 320 wr32(hw, cq->sq.len, (cq->num_sq_entries | cq->sq.len_ena_mask)); in ice_cfg_sq_regs() 321 wr32(hw, cq->sq.bal, lower_32_bits(cq->sq.desc_buf.pa)); in ice_cfg_sq_regs() 322 wr32(hw, cq->sq.bah, upper_32_bits(cq->sq.desc_buf.pa)); in ice_cfg_sq_regs() 345 wr32(hw, cq->rq.head, 0); in ice_cfg_rq_regs() 346 wr32(hw, cq->rq.tail, 0); in ice_cfg_rq_regs() 349 wr32(hw, cq->rq.len, (cq->num_rq_entries | cq->rq.len_ena_mask)); in ice_cfg_rq_regs() 350 wr32(hw, cq->rq.bal, lower_32_bits(cq->rq.desc_buf.pa)); in ice_cfg_rq_regs() 351 wr32(hw, cq->rq.bah, upper_32_bits(cq->rq.desc_buf.pa)); in ice_cfg_rq_regs() [all …]
|
/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/core/ |
D | gpuobj.c | 77 .wr32 = nvkm_gpuobj_wr32_fast, 85 .wr32 = nvkm_gpuobj_heap_wr32, 140 .wr32 = nvkm_gpuobj_wr32_fast, 148 .wr32 = nvkm_gpuobj_wr32,
|
/Linux-v4.19/drivers/net/fjes/ |
D | fjes_hw.c | 76 wr32(XSCT_DCTL, dctl.reg); in fjes_hw_reset() 192 wr32(XSCT_REQBL, (__le32)(param->req_len)); in fjes_hw_init_command_registers() 194 wr32(XSCT_RESPBL, (__le32)(param->res_len)); in fjes_hw_init_command_registers() 197 wr32(XSCT_REQBAL, in fjes_hw_init_command_registers() 199 wr32(XSCT_REQBAH, in fjes_hw_init_command_registers() 203 wr32(XSCT_RESPBAL, in fjes_hw_init_command_registers() 205 wr32(XSCT_RESPBAH, in fjes_hw_init_command_registers() 209 wr32(XSCT_SHSTSAL, in fjes_hw_init_command_registers() 211 wr32(XSCT_SHSTSAH, in fjes_hw_init_command_registers() 395 wr32(XSCT_CR, cr.reg); in fjes_hw_issue_request_command() [all …]
|
/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/pci/ |
D | nv4c.c | 30 .wr32 = nv40_pci_wr32,
|
D | gp100.c | 36 .wr32 = nv40_pci_wr32,
|
D | nv46.c | 43 .wr32 = nv40_pci_wr32,
|
D | g94.c | 31 .wr32 = nv40_pci_wr32,
|
D | gf106.c | 31 .wr32 = nv40_pci_wr32,
|
D | g92.c | 39 .wr32 = nv40_pci_wr32,
|
/Linux-v4.19/drivers/gpu/drm/nouveau/include/nvkm/core/ |
D | memory.h | 43 void (*wr32)(struct nvkm_memory *, u64 offset, u32 data); member 72 #define nvkm_wo32(o,a,d) (o)->ptrs->wr32((o), (a), (d))
|