1208 		wr32(reg, (_test[pat] & write));  in reg_pattern_test()
1228 	wr32(reg, write & mask);  in reg_set_and_check()
1292 	wr32(E1000_STATUS, toggle);  in igb_reg_test()
1302 	wr32(E1000_STATUS, before);  in igb_reg_test()
1420 	wr32(E1000_IMC, ~0);  in igb_intr_test()
1464 			wr32(E1000_ICR, ~0);  in igb_intr_test()
1466 			wr32(E1000_IMC, mask);  in igb_intr_test()
1467 			wr32(E1000_ICS, mask);  in igb_intr_test()
1486 		wr32(E1000_ICR, ~0);  in igb_intr_test()
1488 		wr32(E1000_IMS, mask);  in igb_intr_test()
1489 		wr32(E1000_ICS, mask);  in igb_intr_test()
1508 			wr32(E1000_ICR, ~0);  in igb_intr_test()
1510 			wr32(E1000_IMC, ~mask);  in igb_intr_test()
1511 			wr32(E1000_ICS, ~mask);  in igb_intr_test()
1523 	wr32(E1000_IMC, ~0);  in igb_intr_test()
1575 	wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);  in igb_setup_desc_rings()
1644 	wr32(E1000_CTRL, ctrl_reg);  in igb_integrated_phy_loopback()
1680 			wr32(E1000_MPHY_ADDR_CTL, reg);  in igb_setup_loopback_test()
1684 			wr32(E1000_MPHY_DATA, reg);  in igb_setup_loopback_test()
1689 		wr32(E1000_RCTL, reg);  in igb_setup_loopback_test()
1691 		wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);  in igb_setup_loopback_test()
1699 		wr32(E1000_CTRL, reg);  in igb_setup_loopback_test()
1704 		wr32(E1000_CONNSW, reg);  in igb_setup_loopback_test()
1712 			wr32(E1000_PCS_CFG0, reg);  in igb_setup_loopback_test()
1723 		wr32(E1000_PCS_LCTL, reg);  in igb_setup_loopback_test()
1748 		wr32(E1000_MPHY_ADDR_CTL, reg);  in igb_loopback_cleanup()
1752 		wr32(E1000_MPHY_DATA, reg);  in igb_loopback_cleanup()
1757 	wr32(E1000_RCTL, rctl);  in igb_loopback_cleanup()
2692 		wr32(E1000_MRQC, mrqc);  in igb_set_rss_hash_opt()
2730 	wr32(E1000_ETQF(i), etqf);  in igb_rxnfc_write_etype_filter()
2760 	wr32(E1000_VLAPQF, vlapqf);  in igb_rxnfc_write_vlan_prio_filter()
2818 	wr32(E1000_ETQF(reg_index), etqf);  in igb_clear_etype_filter_regs()
2837 	wr32(E1000_VLAPQF, vlapqf);  in igb_clear_vlan_prio_filter()
3335 		wr32(reg, val << shift);  in igb_write_rss_indir_tbl()