Lines Matching refs:wr32
594 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data()
619 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk()
892 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix()
909 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix()
917 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix()
1150 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability()
1487 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1488 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable()
1490 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1493 wr32(E1000_IAM, 0); in igb_irq_disable()
1494 wr32(E1000_IMC, ~0); in igb_irq_disable()
1518 wr32(E1000_EIAC, regval | adapter->eims_enable_mask); in igb_irq_enable()
1520 wr32(E1000_EIAM, regval | adapter->eims_enable_mask); in igb_irq_enable()
1521 wr32(E1000_EIMS, adapter->eims_enable_mask); in igb_irq_enable()
1523 wr32(E1000_MBVFIMR, 0xFF); in igb_irq_enable()
1526 wr32(E1000_IMS, ims); in igb_irq_enable()
1528 wr32(E1000_IMS, IMS_ENABLE_MASK | in igb_irq_enable()
1530 wr32(E1000_IAM, IMS_ENABLE_MASK | in igb_irq_enable()
1573 wr32(E1000_CTRL_EXT, in igb_release_hw_control()
1592 wr32(E1000_CTRL_EXT, in igb_get_hw_control()
1632 wr32(E1000_I210_TXDCTL(queue), val); in set_tx_desc_fetch_prio()
1649 wr32(E1000_I210_TQAVCC(queue), val); in set_queue_mode()
1732 wr32(E1000_I210_TQAVCTRL, tqavctrl); in igb_config_tx_modes()
1796 wr32(E1000_I210_TQAVCC(queue), tqavcc); in igb_config_tx_modes()
1798 wr32(E1000_I210_TQAVHC(queue), in igb_config_tx_modes()
1805 wr32(E1000_I210_TQAVCC(queue), tqavcc); in igb_config_tx_modes()
1808 wr32(E1000_I210_TQAVHC(queue), 0); in igb_config_tx_modes()
1817 wr32(E1000_I210_TQAVCTRL, tqavctrl); in igb_config_tx_modes()
1834 wr32(E1000_I210_TQAVCTRL, tqavctrl); in igb_config_tx_modes()
1844 wr32(E1000_I210_TQAVCTRL, tqavctrl); in igb_config_tx_modes()
1925 wr32(E1000_I210_TQAVCTRL, val); in igb_setup_tx_mode()
1934 wr32(E1000_TXPBS, val); in igb_setup_tx_mode()
1939 wr32(E1000_RXPBS, val); in igb_setup_tx_mode()
1953 wr32(E1000_I210_DTXMXPKTSZ, val); in igb_setup_tx_mode()
1967 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT); in igb_setup_tx_mode()
1968 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT); in igb_setup_tx_mode()
1969 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT); in igb_setup_tx_mode()
1977 wr32(E1000_I210_TQAVCTRL, val); in igb_setup_tx_mode()
2072 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
2080 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
2111 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_check_swap_media()
2146 wr32(E1000_CTRL_EXT, reg_data); in igb_up()
2176 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); in igb_down()
2187 wr32(E1000_TCTL, tctl); in igb_down()
2253 wr32(E1000_CONNSW, connsw); in igb_enable_mas()
2292 wr32(E1000_PBA, pba); in igb_reset()
2330 wr32(E1000_PBA, pba); in igb_reset()
2360 wr32(E1000_VFRE, 0); in igb_reset()
2361 wr32(E1000_VFTE, 0); in igb_reset()
2366 wr32(E1000_WUC, 0); in igb_reset()
2427 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); in igb_reset()
3247 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT); in igb_probe()
3248 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT); in igb_probe()
3525 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_disable_sriov()
3674 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in igb_remove()
3981 wr32(E1000_CTRL_EXT, reg_data); in __igb_open()
4129 wr32(E1000_TXDCTL(0), 0); in igb_setup_tctl()
4142 wr32(E1000_TCTL, tctl); in igb_setup_tctl()
4160 wr32(E1000_TDLEN(reg_idx), in igb_configure_tx_ring()
4162 wr32(E1000_TDBAL(reg_idx), in igb_configure_tx_ring()
4164 wr32(E1000_TDBAH(reg_idx), tdba >> 32); in igb_configure_tx_ring()
4167 wr32(E1000_TDH(reg_idx), 0); in igb_configure_tx_ring()
4179 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()
4195 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0); in igb_configure_tx()
4282 wr32(E1000_RSSRK(j), rss_key[j]); in igb_setup_mrqc()
4316 wr32(E1000_RXCSUM, rxcsum); in igb_setup_mrqc()
4345 wr32(E1000_VT_CTL, vtctl); in igb_setup_mrqc()
4357 wr32(E1000_MRQC, mrqc); in igb_setup_mrqc()
4390 wr32(E1000_RXDCTL(0), 0); in igb_setup_rctl()
4398 wr32(E1000_QDE, ALL_QUEUES); in igb_setup_rctl()
4417 wr32(E1000_RCTL, rctl); in igb_setup_rctl()
4432 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vf_rlpml()
4456 wr32(reg, val); in igb_set_vf_vlan_strip()
4488 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vmolr()
4508 wr32(E1000_RXDCTL(reg_idx), 0); in igb_configure_rx_ring()
4511 wr32(E1000_RDBAL(reg_idx), in igb_configure_rx_ring()
4513 wr32(E1000_RDBAH(reg_idx), rdba >> 32); in igb_configure_rx_ring()
4514 wr32(E1000_RDLEN(reg_idx), in igb_configure_rx_ring()
4519 wr32(E1000_RDH(reg_idx), 0); in igb_configure_rx_ring()
4535 wr32(E1000_SRRCTL(reg_idx), srrctl); in igb_configure_rx_ring()
4554 wr32(E1000_RXDCTL(reg_idx), rxdctl); in igb_configure_rx_ring()
4910 wr32(E1000_VLVF(i), vlvf); in igb_vlan_promisc_enable()
4965 wr32(E1000_VLVF(i), bits); in igb_scrub_vfta()
5065 wr32(E1000_RCTL, rctl); in igb_set_rx_mode()
5073 wr32(E1000_RLPML, rlpml); in igb_set_rx_mode()
5099 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_rx_mode()
5440 wr32(E1000_EICS, eics); in igb_watchdog_task()
5442 wr32(E1000_ICS, E1000_ICS_RXDMT0); in igb_watchdog_task()
6215 wr32(E1000_EICS, in igb_tx_timeout()
6316 wr32(E1000_RQDPC(i), 0); in igb_update_stats()
6500 wr32(E1000_TRGTTIML0, ts.tv_nsec); in igb_tsync_interrupt()
6501 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec); in igb_tsync_interrupt()
6504 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
6514 wr32(E1000_TRGTTIML1, ts.tv_nsec); in igb_tsync_interrupt()
6515 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec); in igb_tsync_interrupt()
6518 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
6545 wr32(E1000_TSICR, ack); in igb_tsync_interrupt()
6582 wr32(E1000_EIMS, adapter->eims_other); in igb_msix_other()
6638 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl); in igb_update_tx_dca()
6658 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl); in igb_update_rx_dca()
6689 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2); in igb_setup_dca()
6725 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in __igb_notify_dca()
6807 wr32(E1000_VMOLR(vf), vmolr); in igb_set_vf_promisc()
6865 wr32(E1000_VMOLR(i), vmolr); in igb_restore_vf_multicasts()
6917 wr32(E1000_VLVF(i), vlvf); in igb_clear_vf_vfta()
6960 wr32(E1000_VLVF(idx), BIT(pf_id)); in igb_update_pf_vlvf()
6962 wr32(E1000_VLVF(idx), 0); in igb_update_pf_vlvf()
7005 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT)); in igb_set_vmvir()
7007 wr32(E1000_VMVIR(vf), 0); in igb_set_vmvir()
7146 wr32(E1000_VFTE, reg | BIT(vf)); in igb_vf_reset_msg()
7148 wr32(E1000_VFRE, reg | BIT(vf)); in igb_vf_reset_msg()
7718 wr32(E1000_EIMS, q_vector->eims_value); in igb_ring_irq_enable()
8631 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
8636 wr32(E1000_RCTL, rctl); in igb_vlan_mode()
8641 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
8790 wr32(E1000_RCTL, rctl); in __igb_shutdown()
8799 wr32(E1000_CTRL, ctrl); in __igb_shutdown()
8804 wr32(E1000_WUC, E1000_WUC_PME_EN); in __igb_shutdown()
8805 wr32(E1000_WUFC, wufc); in __igb_shutdown()
8807 wr32(E1000_WUC, 0); in __igb_shutdown()
8808 wr32(E1000_WUFC, 0); in __igb_shutdown()
8918 wr32(E1000_WUS, ~0); in igb_resume()
9109 wr32(E1000_WUS, ~0); in igb_io_slot_reset()
9196 wr32(E1000_RAL(index), rar_low); in igb_rar_set_index()
9198 wr32(E1000_RAH(index), rar_high); in igb_rar_set_index()
9291 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */ in igb_set_vf_rate_limit()
9295 wr32(E1000_RTTBCNRM, 0x14); in igb_set_vf_rate_limit()
9296 wr32(E1000_RTTBCNRC, bcnrc_val); in igb_set_vf_rate_limit()
9375 wr32(reg_offset, reg_val); in igb_ndo_set_vf_spoofchk()
9431 wr32(E1000_DTXCTL, reg); in igb_vmm_control()
9437 wr32(E1000_RPLOLR, reg); in igb_vmm_control()
9466 wr32(E1000_DMCTXTH, 0); in igb_init_dmac()
9477 wr32(E1000_FCRTC, reg); in igb_init_dmac()
9498 wr32(E1000_DMACR, reg); in igb_init_dmac()
9503 wr32(E1000_DMCRTRH, 0); in igb_init_dmac()
9507 wr32(E1000_DMCTLX, reg); in igb_init_dmac()
9512 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE - in igb_init_dmac()
9520 wr32(E1000_PCIEMISC, reg); in igb_init_dmac()
9525 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION); in igb_init_dmac()
9526 wr32(E1000_DMACR, 0); in igb_init_dmac()