/Linux-v4.19/drivers/media/pci/cx25821/ |
D | cx25821-medusa-video.c | 34 u32 value = 0; in medusa_enable_bluefield_output() local 73 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output() 74 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output() 76 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output() 77 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output() 79 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output() 80 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output() 82 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output() 83 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output() 90 u32 value = 0; in medusa_initialize_ntsc() local [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce110/ |
D | dce110_opp_csc_v.c | 127 uint32_t value = 0; in program_color_matrix_v() local 131 value, in program_color_matrix_v() 137 value, in program_color_matrix_v() 142 dm_write_reg(ctx, addr, value); in program_color_matrix_v() 145 uint32_t value = 0; in program_color_matrix_v() local 149 value, in program_color_matrix_v() 155 value, in program_color_matrix_v() 160 dm_write_reg(ctx, addr, value); in program_color_matrix_v() 163 uint32_t value = 0; in program_color_matrix_v() local 167 value, in program_color_matrix_v() [all …]
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D | dce110_opp_regamma_v.c | 37 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() local 43 value, in power_on_lut() 49 value, in power_on_lut() 56 value, in power_on_lut() 62 value, in power_on_lut() 68 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut() 71 value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() 72 if (get_reg_field_value(value, in power_on_lut() 75 get_reg_field_value(value, in power_on_lut() 86 uint32_t value; in set_bypass_input_gamma() local [all …]
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D | dce110_timing_generator.c | 95 uint32_t value = 0; in dce110_timing_generator_is_in_vertical_blank() local 100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank() 101 field = get_reg_field_value(value, CRTC_STATUS, CRTC_V_BLANK); in dce110_timing_generator_is_in_vertical_blank() 128 uint32_t value = 0; in dce110_timing_generator_enable_crtc() local 135 value, in dce110_timing_generator_enable_crtc() 140 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc() 143 value = 0; in dce110_timing_generator_enable_crtc() 144 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value); in dce110_timing_generator_enable_crtc() 157 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_program_blank_color() local 160 value, in dce110_timing_generator_program_blank_color() [all …]
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D | dce110_mem_input_v.c | 42 uint32_t value = 0; in set_flip_control() local 44 value = dm_read_reg( in set_flip_control() 48 set_reg_field_value(value, 1, in set_flip_control() 55 value); in set_flip_control() 63 uint32_t value = 0; in program_pri_addr_c() local 69 set_reg_field_value(value, temp, in program_pri_addr_c() 76 value); in program_pri_addr_c() 79 value = 0; in program_pri_addr_c() 83 set_reg_field_value(value, temp, in program_pri_addr_c() 90 value); in program_pri_addr_c() [all …]
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D | dce110_timing_generator_v.c | 60 uint32_t value; in dce110_timing_generator_v_enable_crtc() local 62 value = 0; in dce110_timing_generator_v_enable_crtc() 63 set_reg_field_value(value, 0, in dce110_timing_generator_v_enable_crtc() 66 mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc() 69 value = 0; in dce110_timing_generator_v_enable_crtc() 70 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc() 72 value = 0; in dce110_timing_generator_v_enable_crtc() 73 set_reg_field_value(value, 1, in dce110_timing_generator_v_enable_crtc() 76 mmCRTCV_MASTER_EN, value); in dce110_timing_generator_v_enable_crtc() 83 uint32_t value; in dce110_timing_generator_v_disable_crtc() local [all …]
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/Linux-v4.19/drivers/video/fbdev/riva/ |
D | nvreg.h | 34 #define SetBF(mask,value) ((value) << (0?mask)) argument 37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument 38 | SetBF(mask,value))) 47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument 51 #define DEVICE_DEF(device,mask,value) \ argument 52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value) 53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument 56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument 59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument 60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument [all …]
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/Linux-v4.19/drivers/net/ethernet/stmicro/stmmac/ |
D | dwxgmac2_dma.c | 13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local 16 writel(value | XGMAC_SWR, ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() 18 return readl_poll_timeout(ioaddr + XGMAC_DMA_MODE, value, in dwxgmac2_dma_reset() 19 !(value & XGMAC_SWR), 0, 100000); in dwxgmac2_dma_reset() 25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local 28 value |= XGMAC_AAL; in dwxgmac2_dma_init() 30 writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() 36 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() local 39 value |= XGMAC_PBLx8; in dwxgmac2_dma_init_chan() 41 writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() [all …]
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D | dwmac4_core.c | 30 u32 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_core_init() local 33 value |= GMAC_CORE_INIT; in dwmac4_core_init() 36 value |= GMAC_CONFIG_2K; in dwmac4_core_init() 38 value |= GMAC_CONFIG_JE; in dwmac4_core_init() 41 value |= GMAC_CONFIG_TE; in dwmac4_core_init() 43 value &= hw->link.speed_mask; in dwmac4_core_init() 46 value |= hw->link.speed1000; in dwmac4_core_init() 49 value |= hw->link.speed100; in dwmac4_core_init() 52 value |= hw->link.speed10; in dwmac4_core_init() 57 writel(value, ioaddr + GMAC_CONFIG); in dwmac4_core_init() [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/include/ |
D | fixed31_32.h | 58 long long value; member 97 res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART; in dc_fixpt_from_int() 115 res.value = -arg.value; in dc_fixpt_neg() 126 if (arg.value < 0) in dc_fixpt_abs() 143 return arg1.value < arg2.value; in dc_fixpt_lt() 152 return arg1.value <= arg2.value; in dc_fixpt_le() 161 return arg1.value == arg2.value; in dc_fixpt_eq() 170 if (arg1.value <= arg2.value) in dc_fixpt_min() 182 if (arg1.value <= arg2.value) in dc_fixpt_max() 218 ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) || in dc_fixpt_shl() [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_scl_filters.c | 1017 if (ratio.value < dc_fixpt_one.value) in get_filter_3tap_16p() 1019 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_3tap_16p() 1021 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_3tap_16p() 1029 if (ratio.value < dc_fixpt_one.value) in get_filter_3tap_64p() 1031 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_3tap_64p() 1033 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_3tap_64p() 1041 if (ratio.value < dc_fixpt_one.value) in get_filter_4tap_16p() 1043 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_4tap_16p() 1045 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_4tap_16p() 1053 if (ratio.value < dc_fixpt_one.value) in get_filter_4tap_64p() [all …]
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D | dce_audio.c | 52 #define AZ_REG_WRITE(reg_name, value) \ argument 53 write_indirect_azalia_reg(audio, IX_REG(reg_name), value) 77 uint32_t value = 0; in read_indirect_azalia_reg() local 84 value = REG_READ(AZALIA_F0_CODEC_ENDPOINT_DATA); in read_indirect_azalia_reg() 87 reg_index, value); in read_indirect_azalia_reg() 89 return value; in read_indirect_azalia_reg() 295 uint32_t value = 0; in set_high_bit_rate_capable() local 298 value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR); in set_high_bit_rate_capable() 300 set_reg_field_value(value, capable, in set_high_bit_rate_capable() 304 AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR, value); in set_high_bit_rate_capable() [all …]
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/Linux-v4.19/drivers/phy/tegra/ |
D | xusb-tegra210.c | 256 u32 value; in tegra210_pex_uphy_enable() local 272 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable() 273 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK << in tegra210_pex_uphy_enable() 275 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL << in tegra210_pex_uphy_enable() 277 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable() 279 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable() 280 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK << in tegra210_pex_uphy_enable() 282 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL << in tegra210_pex_uphy_enable() 284 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable() 286 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable() [all …]
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D | xusb-tegra124.c | 235 u32 value; in tegra124_xusb_padctl_enable() local 242 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() 243 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in tegra124_xusb_padctl_enable() 244 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() 248 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() 249 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in tegra124_xusb_padctl_enable() 250 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() 254 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() 255 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in tegra124_xusb_padctl_enable() 256 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable() [all …]
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/Linux-v4.19/sound/soc/omap/ |
D | mcbsp.h | 102 #define RINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ argument 105 #define CLKSTP(value) (((value) & 0x3) << 11) /* bits 11:12 */ argument 106 #define RJUST(value) (((value) & 0x3) << 13) /* bits 13:14 */ argument 115 #define XINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ argument 139 #define RWDLEN1(value) (((value) & 0x7) << 5) /* Bits 5:7 */ argument 140 #define RFRLEN1(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ argument 143 #define XWDLEN1(value) (((value) & 0x7) << 5) /* Bits 5:7 */ argument 144 #define XFRLEN1(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ argument 147 #define RDATDLY(value) ((value) & 0x3) /* Bits 0:1 */ argument 149 #define RCOMPAND(value) (((value) & 0x3) << 3) /* Bits 3:4 */ argument [all …]
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/Linux-v4.19/drivers/gpu/drm/tegra/ |
D | sor.c | 399 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl() local 401 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl() 403 return value; in tegra_sor_readl() 406 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument 409 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel() 410 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel() 448 u32 value; in tegra_clk_sor_pad_set_parent() local 450 value = tegra_sor_readl(sor, SOR_CLK_CNTRL); in tegra_clk_sor_pad_set_parent() 451 value &= ~SOR_CLK_CNTRL_DP_CLK_SEL_MASK; in tegra_clk_sor_pad_set_parent() 455 value |= SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_PCLK; in tegra_clk_sor_pad_set_parent() [all …]
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/Linux-v4.19/arch/mips/include/asm/octeon/ |
D | cvmx-fau.h | 62 int64_t value:63; member 72 int32_t value:31; member 82 int16_t value:15; member 92 int8_t value:7; member 153 int64_t value) in __cvmx_fau_atomic_address() argument 156 cvmx_build_bits(CVMX_FAU_BITS_INEVAL, value) | in __cvmx_fau_atomic_address() 171 int64_t value) in cvmx_fau_fetch_and_add64() argument 173 return cvmx_read64_int64(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add64() 186 int32_t value) in cvmx_fau_fetch_and_add32() argument 189 return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add32() [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/inc/ |
D | bw_fixed.h | 33 int64_t value; member 45 return (arg1.value <= arg2.value) ? arg1 : arg2; in bw_min2() 51 return (arg2.value <= arg1.value) ? arg1 : arg2; in bw_max2() 68 struct bw_fixed bw_int_to_fixed_nonconst(int64_t value); 69 static inline struct bw_fixed bw_int_to_fixed(int64_t value) in bw_int_to_fixed() argument 71 if (__builtin_constant_p(value)) { in bw_int_to_fixed() 73 BUILD_BUG_ON(value > BW_FIXED_MAX_I32 || value < BW_FIXED_MIN_I32); in bw_int_to_fixed() 74 res.value = value << BW_FIXED_BITS_PER_FRACTIONAL_PART; in bw_int_to_fixed() 77 return bw_int_to_fixed_nonconst(value); in bw_int_to_fixed() 80 static inline int32_t bw_fixed_to_int(struct bw_fixed value) in bw_fixed_to_int() argument [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/i2caux/dce80/ |
D | i2c_hw_engine_dce80.c | 98 uint32_t value = 0; in disable_i2c_hw_engine() local 104 value = dm_read_reg(ctx, addr); in disable_i2c_hw_engine() 107 value, in disable_i2c_hw_engine() 112 dm_write_reg(ctx, addr, value); in disable_i2c_hw_engine() 122 uint32_t value = 0; in release_engine() local 132 value = dm_read_reg(engine->ctx, mmDC_I2C_ARBITRATION); in release_engine() 135 value, in release_engine() 140 dm_write_reg(engine->ctx, mmDC_I2C_ARBITRATION, value); in release_engine() 147 value = dm_read_reg(engine->ctx, mmDC_I2C_SW_STATUS); in release_engine() 150 value, in release_engine() [all …]
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/Linux-v4.19/include/acpi/ |
D | acbuffer.h | 122 #define ACPI_PLD_SET_REVISION(dword,value) ACPI_SET_BITS (dword, 0, ACPI_7BIT_MASK, value) /* … argument 125 #define ACPI_PLD_SET_IGNORE_COLOR(dword,value) ACPI_SET_BITS (dword, 7, ACPI_1BIT_MASK, value) /* … argument 128 #define ACPI_PLD_SET_RED(dword,value) ACPI_SET_BITS (dword, 8, ACPI_8BIT_MASK, value) /* … argument 131 #define ACPI_PLD_SET_GREEN(dword,value) ACPI_SET_BITS (dword, 16, ACPI_8BIT_MASK, value) /*… argument 134 #define ACPI_PLD_SET_BLUE(dword,value) ACPI_SET_BITS (dword, 24, ACPI_8BIT_MASK, value) /*… argument 139 #define ACPI_PLD_SET_WIDTH(dword,value) ACPI_SET_BITS (dword, 0, ACPI_16BIT_MASK, value) /*… argument 142 #define ACPI_PLD_SET_HEIGHT(dword,value) ACPI_SET_BITS (dword, 16, ACPI_16BIT_MASK, value) /… argument 147 #define ACPI_PLD_SET_USER_VISIBLE(dword,value) ACPI_SET_BITS (dword, 0, ACPI_1BIT_MASK, value) /* … argument 150 #define ACPI_PLD_SET_DOCK(dword,value) ACPI_SET_BITS (dword, 1, ACPI_1BIT_MASK, value) /* … argument 153 #define ACPI_PLD_SET_LID(dword,value) ACPI_SET_BITS (dword, 2, ACPI_1BIT_MASK, value) /* … argument [all …]
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/Linux-v4.19/drivers/net/ethernet/sfc/falcon/ |
D | io.h | 70 static inline void _ef4_writeq(struct ef4_nic *efx, __le64 value, in _ef4_writeq() argument 73 __raw_writeq((__force u64)value, efx->membase + reg); in _ef4_writeq() 81 static inline void _ef4_writed(struct ef4_nic *efx, __le32 value, in _ef4_writed() argument 84 __raw_writel((__force u32)value, efx->membase + reg); in _ef4_writed() 92 static inline void ef4_writeo(struct ef4_nic *efx, const ef4_oword_t *value, in ef4_writeo() argument 99 EF4_OWORD_VAL(*value)); in ef4_writeo() 103 _ef4_writeq(efx, value->u64[0], reg + 0); in ef4_writeo() 104 _ef4_writeq(efx, value->u64[1], reg + 8); in ef4_writeo() 106 _ef4_writed(efx, value->u32[0], reg + 0); in ef4_writeo() 107 _ef4_writed(efx, value->u32[1], reg + 4); in ef4_writeo() [all …]
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/Linux-v4.19/drivers/net/ethernet/sfc/ |
D | io.h | 82 static inline void _efx_writeq(struct efx_nic *efx, __le64 value, in _efx_writeq() argument 85 __raw_writeq((__force u64)value, efx->membase + reg); in _efx_writeq() 93 static inline void _efx_writed(struct efx_nic *efx, __le32 value, in _efx_writed() argument 96 __raw_writel((__force u32)value, efx->membase + reg); in _efx_writed() 104 static inline void efx_writeo(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo() argument 111 EFX_OWORD_VAL(*value)); in efx_writeo() 115 _efx_writeq(efx, value->u64[0], reg + 0); in efx_writeo() 116 _efx_writeq(efx, value->u64[1], reg + 8); in efx_writeo() 118 _efx_writed(efx, value->u32[0], reg + 0); in efx_writeo() 119 _efx_writed(efx, value->u32[1], reg + 4); in efx_writeo() [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/calcs/ |
D | bw_fixed.c | 49 struct bw_fixed bw_int_to_fixed_nonconst(int64_t value) in bw_int_to_fixed_nonconst() argument 52 ASSERT(value < BW_FIXED_MAX_I32 && value > BW_FIXED_MIN_I32); in bw_int_to_fixed_nonconst() 53 res.value = value << BW_FIXED_BITS_PER_FRACTIONAL_PART; in bw_int_to_fixed_nonconst() 104 res.value = (int64_t)(res_value); in bw_frc_to_fixed() 107 res.value = -res.value; in bw_frc_to_fixed() 118 multiplicand = div64_s64(arg.value, abs_i64(significance.value)); in bw_floor2() 119 result.value = abs_i64(significance.value) * multiplicand; in bw_floor2() 120 ASSERT(abs_i64(result.value) <= abs_i64(arg.value)); in bw_floor2() 131 multiplicand = div64_s64(arg.value, abs_i64(significance.value)); in bw_ceil2() 132 result.value = abs_i64(significance.value) * multiplicand; in bw_ceil2() [all …]
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/Linux-v4.19/drivers/infiniband/hw/bnxt_re/ |
D | hw_counters.c | 123 stats->value[BNXT_RE_ACTIVE_QP] = atomic_read(&rdev->qp_count); in bnxt_re_ib_get_hw_stats() 124 stats->value[BNXT_RE_ACTIVE_SRQ] = atomic_read(&rdev->srq_count); in bnxt_re_ib_get_hw_stats() 125 stats->value[BNXT_RE_ACTIVE_CQ] = atomic_read(&rdev->cq_count); in bnxt_re_ib_get_hw_stats() 126 stats->value[BNXT_RE_ACTIVE_MR] = atomic_read(&rdev->mr_count); in bnxt_re_ib_get_hw_stats() 127 stats->value[BNXT_RE_ACTIVE_MW] = atomic_read(&rdev->mw_count); in bnxt_re_ib_get_hw_stats() 129 stats->value[BNXT_RE_RECOVERABLE_ERRORS] = in bnxt_re_ib_get_hw_stats() 131 stats->value[BNXT_RE_RX_PKTS] = in bnxt_re_ib_get_hw_stats() 133 stats->value[BNXT_RE_RX_BYTES] = in bnxt_re_ib_get_hw_stats() 135 stats->value[BNXT_RE_TX_PKTS] = in bnxt_re_ib_get_hw_stats() 137 stats->value[BNXT_RE_TX_BYTES] = in bnxt_re_ib_get_hw_stats() [all …]
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/basics/ |
D | fixpt31_32.c | 111 res.value = (long long)res_value; in dc_fixpt_from_fraction() 114 res.value = -res.value; in dc_fixpt_from_fraction() 123 bool arg1_negative = arg1.value < 0; in dc_fixpt_mul() 124 bool arg2_negative = arg2.value < 0; in dc_fixpt_mul() 126 unsigned long long arg1_value = arg1_negative ? -arg1.value : arg1.value; in dc_fixpt_mul() 127 unsigned long long arg2_value = arg2_negative ? -arg2.value : arg2.value; in dc_fixpt_mul() 137 res.value = arg1_int * arg2_int; in dc_fixpt_mul() 139 ASSERT(res.value <= LONG_MAX); in dc_fixpt_mul() 141 res.value <<= FIXED31_32_BITS_PER_FRACTIONAL_PART; in dc_fixpt_mul() 145 ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value)); in dc_fixpt_mul() [all …]
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