Lines Matching refs:value
235 u32 value; in tegra124_xusb_padctl_enable() local
242 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
243 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in tegra124_xusb_padctl_enable()
244 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
248 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
249 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in tegra124_xusb_padctl_enable()
250 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
254 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
255 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in tegra124_xusb_padctl_enable()
256 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
265 u32 value; in tegra124_xusb_padctl_disable() local
275 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
276 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in tegra124_xusb_padctl_disable()
277 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
281 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
282 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in tegra124_xusb_padctl_disable()
283 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
287 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
288 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in tegra124_xusb_padctl_disable()
289 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
301 u32 value, offset; in tegra124_usb3_save_context() local
315 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
316 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
318 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_TAP << in tegra124_usb3_save_context()
320 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
322 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
324 port->tap1 = value & XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_TAP_MASK; in tegra124_usb3_save_context()
326 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
327 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
329 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_AMP << in tegra124_usb3_save_context()
331 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
333 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
335 port->amp = value & XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_AMP_MASK; in tegra124_usb3_save_context()
337 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_save_context()
338 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_MASK << in tegra124_usb3_save_context()
342 value |= (port->tap1 << in tegra124_usb3_save_context()
346 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_save_context()
348 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
349 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
351 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_LATCH_G_Z << in tegra124_usb3_save_context()
353 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
355 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
356 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
358 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_G_Z << in tegra124_usb3_save_context()
360 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
362 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
364 port->ctle_g = value & in tegra124_usb3_save_context()
367 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
368 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
370 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_CTLE_Z << in tegra124_usb3_save_context()
372 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
374 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
376 port->ctle_z = value & in tegra124_usb3_save_context()
379 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_save_context()
380 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_MASK << in tegra124_usb3_save_context()
384 value |= (port->ctle_g << in tegra124_usb3_save_context()
388 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_save_context()
396 u32 value; in tegra124_hsic_set_idle() local
398 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_set_idle()
401 value |= XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_set_idle()
404 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_set_idle()
407 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_set_idle()
495 u32 value; in tegra124_usb2_phy_power_on() local
506 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
507 value &= ~((XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK << in tegra124_usb2_phy_power_on()
511 value |= (priv->fuse.hs_squelch_level << in tegra124_usb2_phy_power_on()
515 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
517 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra124_usb2_phy_power_on()
518 value &= ~(XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK << in tegra124_usb2_phy_power_on()
520 value |= XUSB_PADCTL_USB2_PORT_CAP_HOST << in tegra124_usb2_phy_power_on()
522 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra124_usb2_phy_power_on()
524 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra124_usb2_phy_power_on()
525 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK << in tegra124_usb2_phy_power_on()
534 value |= (priv->fuse.hs_curr_level[index] + in tegra124_usb2_phy_power_on()
537 value |= XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL << in tegra124_usb2_phy_power_on()
539 value |= XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL(index) << in tegra124_usb2_phy_power_on()
541 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra124_usb2_phy_power_on()
543 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra124_usb2_phy_power_on()
544 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK << in tegra124_usb2_phy_power_on()
551 value |= (priv->fuse.hs_term_range_adj << in tegra124_usb2_phy_power_on()
555 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra124_usb2_phy_power_on()
566 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
567 value &= ~XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD; in tegra124_usb2_phy_power_on()
568 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
581 u32 value; in tegra124_usb2_phy_power_off() local
598 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_off()
599 value |= XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD; in tegra124_usb2_phy_power_off()
600 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_off()
878 u32 value; in tegra124_hsic_phy_power_on() local
888 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
891 value |= XUSB_PADCTL_HSIC_PAD_CTL1_AUTO_TERM_EN; in tegra124_hsic_phy_power_on()
893 value &= ~XUSB_PADCTL_HSIC_PAD_CTL1_AUTO_TERM_EN; in tegra124_hsic_phy_power_on()
895 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
897 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index)); in tegra124_hsic_phy_power_on()
898 value &= ~((XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEN_MASK << in tegra124_hsic_phy_power_on()
906 value |= (hsic->tx_rtune_n << in tegra124_hsic_phy_power_on()
914 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL0(index)); in tegra124_hsic_phy_power_on()
916 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL2(index)); in tegra124_hsic_phy_power_on()
917 value &= ~((XUSB_PADCTL_HSIC_PAD_CTL2_RX_STROBE_TRIM_MASK << in tegra124_hsic_phy_power_on()
921 value |= (hsic->rx_strobe_trim << in tegra124_hsic_phy_power_on()
925 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL2(index)); in tegra124_hsic_phy_power_on()
927 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
928 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL1_RPD_STROBE | in tegra124_hsic_phy_power_on()
934 value |= XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_phy_power_on()
936 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
947 u32 value; in tegra124_hsic_phy_power_off() local
949 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_off()
950 value |= XUSB_PADCTL_HSIC_PAD_CTL1_PD_RX | in tegra124_hsic_phy_power_off()
954 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_off()
1097 u32 value; in tegra124_pcie_phy_power_on() local
1099 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1100 value &= ~XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK; in tegra124_pcie_phy_power_on()
1101 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1103 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()
1104 value |= XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN | in tegra124_pcie_phy_power_on()
1107 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()
1109 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1110 value |= XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST; in tegra124_pcie_phy_power_on()
1111 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1116 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1117 if (value & XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET) { in tegra124_pcie_phy_power_on()
1125 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_on()
1126 value |= XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index); in tegra124_pcie_phy_power_on()
1127 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_on()
1136 u32 value; in tegra124_pcie_phy_power_off() local
1138 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_off()
1139 value &= ~XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index); in tegra124_pcie_phy_power_off()
1140 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_off()
1142 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_off()
1143 value &= ~XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST; in tegra124_pcie_phy_power_off()
1144 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_off()
1275 u32 value; in tegra124_sata_phy_power_on() local
1277 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_on()
1278 value &= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in tegra124_sata_phy_power_on()
1279 value &= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ; in tegra124_sata_phy_power_on()
1280 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_on()
1282 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1283 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in tegra124_sata_phy_power_on()
1284 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ; in tegra124_sata_phy_power_on()
1285 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1287 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1288 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE; in tegra124_sata_phy_power_on()
1289 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1291 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1292 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST; in tegra124_sata_phy_power_on()
1293 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1298 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1299 if (value & XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_LOCKDET) { in tegra124_sata_phy_power_on()
1307 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_on()
1308 value |= XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index); in tegra124_sata_phy_power_on()
1309 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_on()
1318 u32 value; in tegra124_sata_phy_power_off() local
1320 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_off()
1321 value &= ~XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index); in tegra124_sata_phy_power_off()
1322 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_off()
1324 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1325 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST; in tegra124_sata_phy_power_off()
1326 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1328 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1329 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE; in tegra124_sata_phy_power_off()
1330 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1332 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1333 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in tegra124_sata_phy_power_off()
1334 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ; in tegra124_sata_phy_power_off()
1335 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1337 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_off()
1338 value |= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in tegra124_sata_phy_power_off()
1339 value |= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ; in tegra124_sata_phy_power_off()
1340 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_off()
1486 u32 value; in tegra124_usb3_port_enable() local
1488 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_enable()
1491 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()
1493 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()
1495 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index); in tegra124_usb3_port_enable()
1496 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, usb3->port); in tegra124_usb3_port_enable()
1497 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_enable()
1504 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_port_enable()
1505 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_MASK << in tegra124_usb3_port_enable()
1511 value |= (XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_VAL << in tegra124_usb3_port_enable()
1519 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_MASK << in tegra124_usb3_port_enable()
1523 value |= (usb3->ctle_g << in tegra124_usb3_port_enable()
1529 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_port_enable()
1531 value = XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_VAL; in tegra124_usb3_port_enable()
1534 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_MASK << in tegra124_usb3_port_enable()
1538 value |= (usb3->tap1 << in tegra124_usb3_port_enable()
1544 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_port_enable()
1551 value = padctl_readl(padctl, offset); in tegra124_usb3_port_enable()
1552 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_MASK << in tegra124_usb3_port_enable()
1554 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_VAL << in tegra124_usb3_port_enable()
1556 padctl_writel(padctl, value, offset); in tegra124_usb3_port_enable()
1563 value = padctl_readl(padctl, offset); in tegra124_usb3_port_enable()
1564 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL5_RX_QEYE_EN; in tegra124_usb3_port_enable()
1565 padctl_writel(padctl, value, offset); in tegra124_usb3_port_enable()
1569 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_usb3_port_enable()
1570 value &= ~(XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL0_REFCLK_NDIV_MASK << in tegra124_usb3_port_enable()
1572 value |= 0x2 << in tegra124_usb3_port_enable()
1574 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_usb3_port_enable()
1576 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL2); in tegra124_usb3_port_enable()
1577 value &= ~((XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK << in tegra124_usb3_port_enable()
1584 value |= (0x7 << in tegra124_usb3_port_enable()
1591 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL2); in tegra124_usb3_port_enable()
1593 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL3); in tegra124_usb3_port_enable()
1594 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL3_RCAL_BYPASS; in tegra124_usb3_port_enable()
1595 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL3); in tegra124_usb3_port_enable()
1598 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1599 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(index); in tegra124_usb3_port_enable()
1600 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1604 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1605 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra124_usb3_port_enable()
1606 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1610 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1611 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(index); in tegra124_usb3_port_enable()
1612 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1620 u32 value; in tegra124_usb3_port_disable() local
1622 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1623 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(port->index); in tegra124_usb3_port_disable()
1624 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1628 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1629 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(port->index); in tegra124_usb3_port_disable()
1630 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1634 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1635 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(port->index); in tegra124_usb3_port_disable()
1636 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1638 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_disable()
1639 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(port->index); in tegra124_usb3_port_disable()
1640 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(port->index, 0x7); in tegra124_usb3_port_disable()
1641 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_disable()
1668 u32 value; in tegra124_xusb_read_fuse_calibration() local
1670 err = tegra_fuse_readl(TEGRA_FUSE_SKU_CALIB_0, &value); in tegra124_xusb_read_fuse_calibration()
1676 (value >> FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(i)) & in tegra124_xusb_read_fuse_calibration()
1680 (value >> FUSE_SKU_CALIB_HS_IREF_CAP_SHIFT) & in tegra124_xusb_read_fuse_calibration()
1683 (value >> FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_SHIFT) & in tegra124_xusb_read_fuse_calibration()
1686 (value >> FUSE_SKU_CALIB_HS_SQUELCH_LEVEL_SHIFT) & in tegra124_xusb_read_fuse_calibration()