| /Linux-v4.19/drivers/clocksource/ |
| D | timer-oxnas-rps.c | 73 struct oxnas_rps_timer *rps = dev_id; in oxnas_rps_timer_irq() local
75 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG); in oxnas_rps_timer_irq()
77 rps->clkevent.event_handler(&rps->clkevent); in oxnas_rps_timer_irq()
82 static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps, in oxnas_rps_timer_config() argument
86 uint32_t cfg = rps->timer_prescaler; in oxnas_rps_timer_config()
94 writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG); in oxnas_rps_timer_config()
95 writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG); in oxnas_rps_timer_config()
100 struct oxnas_rps_timer *rps = in oxnas_rps_timer_shutdown() local
103 oxnas_rps_timer_config(rps, 0, 0); in oxnas_rps_timer_shutdown()
110 struct oxnas_rps_timer *rps = in oxnas_rps_timer_set_periodic() local
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| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | i915_sysfs.c | 289 dev_priv->gt_pm.rps.cur_freq)); in gt_cur_freq_mhz_show()
298 dev_priv->gt_pm.rps.boost_freq)); in gt_boost_freq_mhz_show()
306 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gt_boost_freq_mhz_store() local
317 if (val < rps->min_freq || val > rps->max_freq) in gt_boost_freq_mhz_store()
321 if (val != rps->boost_freq) { in gt_boost_freq_mhz_store()
322 rps->boost_freq = val; in gt_boost_freq_mhz_store()
323 boost = atomic_read(&rps->num_waiters); in gt_boost_freq_mhz_store()
327 schedule_work(&rps->work); in gt_boost_freq_mhz_store()
339 dev_priv->gt_pm.rps.efficient_freq)); in vlv_rpe_freq_mhz_show()
348 dev_priv->gt_pm.rps.max_freq_softlimit)); in gt_max_freq_mhz_show()
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| D | intel_pm.c | 6245 struct intel_rps *rps = &dev_priv->gt_pm.rps; in intel_rps_limits() local
6255 limits = (rps->max_freq_softlimit) << 23; in intel_rps_limits()
6256 if (val <= rps->min_freq_softlimit) in intel_rps_limits()
6257 limits |= (rps->min_freq_softlimit) << 14; in intel_rps_limits()
6259 limits = rps->max_freq_softlimit << 24; in intel_rps_limits()
6260 if (val <= rps->min_freq_softlimit) in intel_rps_limits()
6261 limits |= rps->min_freq_softlimit << 16; in intel_rps_limits()
6269 struct intel_rps *rps = &dev_priv->gt_pm.rps; in rps_set_power() local
6273 lockdep_assert_held(&rps->power.mutex); in rps_set_power()
6275 if (new_power == rps->power.mode) in rps_set_power()
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| D | i915_irq.c | 473 dev_priv->gt_pm.rps.pm_iir = 0; in gen11_reset_rps_interrupts()
482 dev_priv->gt_pm.rps.pm_iir = 0; in gen6_reset_rps_interrupts()
488 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gen6_enable_rps_interrupts() local
490 if (READ_ONCE(rps->interrupts_enabled)) in gen6_enable_rps_interrupts()
494 WARN_ON_ONCE(rps->pm_iir); in gen6_enable_rps_interrupts()
501 rps->interrupts_enabled = true; in gen6_enable_rps_interrupts()
509 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gen6_disable_rps_interrupts() local
511 if (!READ_ONCE(rps->interrupts_enabled)) in gen6_disable_rps_interrupts()
515 rps->interrupts_enabled = false; in gen6_disable_rps_interrupts()
529 cancel_work_sync(&rps->work); in gen6_disable_rps_interrupts()
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| D | i915_debugfs.c | 1062 struct intel_rps *rps = &dev_priv->gt_pm.rps; in i915_frequency_info() local
1099 intel_gpu_freq(dev_priv, rps->cur_freq)); in i915_frequency_info()
1102 intel_gpu_freq(dev_priv, rps->max_freq)); in i915_frequency_info()
1105 intel_gpu_freq(dev_priv, rps->min_freq)); in i915_frequency_info()
1108 intel_gpu_freq(dev_priv, rps->idle_freq)); in i915_frequency_info()
1112 intel_gpu_freq(dev_priv, rps->efficient_freq)); in i915_frequency_info()
1201 rps->pm_intrmsk_mbz); in i915_frequency_info()
1222 rps->power.up_threshold); in i915_frequency_info()
1231 rps->power.down_threshold); in i915_frequency_info()
1253 intel_gpu_freq(dev_priv, rps->max_freq)); in i915_frequency_info()
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| D | intel_guc_submission.c | 1194 struct intel_rps *rps = &dev_priv->gt_pm.rps; in guc_interrupts_capture() local
1233 rps->pm_intrmsk_mbz |= ARAT_EXPIRED_INTRMSK; in guc_interrupts_capture()
1234 rps->pm_intrmsk_mbz &= ~GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; in guc_interrupts_capture()
1239 struct intel_rps *rps = &dev_priv->gt_pm.rps; in guc_interrupts_release() local
1258 rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; in guc_interrupts_release()
1259 rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK; in guc_interrupts_release()
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| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | rs780_dpm.c | 34 static struct igp_ps *rs780_get_ps(struct radeon_ps *rps) in rs780_get_ps() argument
36 struct igp_ps *ps = rps->ps_priv; in rs780_get_ps()
718 struct radeon_ps *rps, in rs780_parse_pplib_non_clock_info() argument
722 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rs780_parse_pplib_non_clock_info()
723 rps->class = le16_to_cpu(non_clock_info->usClassification); in rs780_parse_pplib_non_clock_info()
724 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rs780_parse_pplib_non_clock_info()
727 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in rs780_parse_pplib_non_clock_info()
728 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rs780_parse_pplib_non_clock_info()
730 rps->vclk = 0; in rs780_parse_pplib_non_clock_info()
731 rps->dclk = 0; in rs780_parse_pplib_non_clock_info()
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| D | trinity_dpm.c | 347 static struct trinity_ps *trinity_get_ps(struct radeon_ps *rps) in trinity_get_ps() argument
349 struct trinity_ps *ps = rps->ps_priv; in trinity_get_ps()
869 struct radeon_ps *rps) in trinity_setup_uvd_clock_table() argument
871 struct trinity_ps *ps = trinity_get_ps(rps); in trinity_setup_uvd_clock_table()
895 static bool trinity_uvd_clocks_zero(struct radeon_ps *rps) in trinity_uvd_clocks_zero() argument
897 if ((rps->vclk == 0) && (rps->dclk == 0)) in trinity_uvd_clocks_zero()
1067 struct radeon_ps *rps) in trinity_update_current_ps() argument
1069 struct trinity_ps *new_ps = trinity_get_ps(rps); in trinity_update_current_ps()
1072 pi->current_rps = *rps; in trinity_update_current_ps()
1078 struct radeon_ps *rps) in trinity_update_requested_ps() argument
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| D | sumo_dpm.c | 75 static struct sumo_ps *sumo_get_ps(struct radeon_ps *rps) in sumo_get_ps() argument
77 struct sumo_ps *ps = rps->ps_priv; in sumo_get_ps()
343 struct radeon_ps *rps) in sumo_program_bsp() argument
346 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_bsp()
386 struct radeon_ps *rps) in sumo_program_at() argument
389 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_at()
665 struct radeon_ps *rps) in sumo_patch_boost_state() argument
668 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_patch_boost_state()
715 struct radeon_ps *rps, in sumo_enable_boost() argument
718 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_enable_boost()
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| D | rv770_dpm.c | 48 struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps) in rv770_get_ps() argument
50 struct rv7xx_ps *ps = rps->ps_priv; in rv770_get_ps()
2145 struct radeon_ps *rps, in rv7xx_parse_pplib_non_clock_info() argument
2149 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rv7xx_parse_pplib_non_clock_info()
2150 rps->class = le16_to_cpu(non_clock_info->usClassification); in rv7xx_parse_pplib_non_clock_info()
2151 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv7xx_parse_pplib_non_clock_info()
2154 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in rv7xx_parse_pplib_non_clock_info()
2155 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rv7xx_parse_pplib_non_clock_info()
2157 rps->vclk = 0; in rv7xx_parse_pplib_non_clock_info()
2158 rps->dclk = 0; in rv7xx_parse_pplib_non_clock_info()
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| D | rv6xx_dpm.c | 37 static struct rv6xx_ps *rv6xx_get_ps(struct radeon_ps *rps) in rv6xx_get_ps() argument
39 struct rv6xx_ps *ps = rps->ps_priv; in rv6xx_get_ps()
1796 struct radeon_ps *rps, in rv6xx_parse_pplib_non_clock_info() argument
1799 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rv6xx_parse_pplib_non_clock_info()
1800 rps->class = le16_to_cpu(non_clock_info->usClassification); in rv6xx_parse_pplib_non_clock_info()
1801 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv6xx_parse_pplib_non_clock_info()
1803 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv6xx_parse_pplib_non_clock_info()
1804 rps->vclk = RV6XX_DEFAULT_VCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1805 rps->dclk = RV6XX_DEFAULT_DCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1807 rps->vclk = 0; in rv6xx_parse_pplib_non_clock_info()
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| D | ni_dpm.c | 733 struct ni_ps *ni_get_ps(struct radeon_ps *rps) in ni_get_ps() argument
735 struct ni_ps *ps = rps->ps_priv; in ni_get_ps()
786 struct radeon_ps *rps) in ni_apply_state_adjust_rules() argument
788 struct ni_ps *ps = ni_get_ps(rps); in ni_apply_state_adjust_rules()
3560 struct radeon_ps *rps) in ni_update_current_ps() argument
3562 struct ni_ps *new_ps = ni_get_ps(rps); in ni_update_current_ps()
3566 eg_pi->current_rps = *rps; in ni_update_current_ps()
3572 struct radeon_ps *rps) in ni_update_requested_ps() argument
3574 struct ni_ps *new_ps = ni_get_ps(rps); in ni_update_requested_ps()
3578 eg_pi->requested_rps = *rps; in ni_update_requested_ps()
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| D | kv_dpm.c | 242 static struct kv_ps *kv_get_ps(struct radeon_ps *rps) in kv_get_ps() argument
244 struct kv_ps *ps = rps->ps_priv; in kv_get_ps()
1139 struct radeon_ps *rps) in kv_update_current_ps() argument
1141 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps()
1144 pi->current_rps = *rps; in kv_update_current_ps()
1150 struct radeon_ps *rps) in kv_update_requested_ps() argument
1152 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps()
1155 pi->requested_rps = *rps; in kv_update_requested_ps()
2583 struct radeon_ps *rps, in kv_parse_pplib_non_clock_info() argument
2587 struct kv_ps *ps = kv_get_ps(rps); in kv_parse_pplib_non_clock_info()
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| D | btc_dpm.c | 50 struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps);
2095 struct radeon_ps *rps) in btc_apply_state_adjust_rules() argument
2097 struct rv7xx_ps *ps = rv770_get_ps(rps); in btc_apply_state_adjust_rules()
2258 struct radeon_ps *rps) in btc_update_current_ps() argument
2260 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_current_ps()
2263 eg_pi->current_rps = *rps; in btc_update_current_ps()
2269 struct radeon_ps *rps) in btc_update_requested_ps() argument
2271 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_requested_ps()
2274 eg_pi->requested_rps = *rps; in btc_update_requested_ps()
2738 struct radeon_ps *rps = &eg_pi->current_rps; in btc_dpm_debugfs_print_current_performance_level() local
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| D | si_dpm.c | 1740 struct ni_ps *ni_get_ps(struct radeon_ps *rps);
2966 struct radeon_ps *rps) in si_apply_state_adjust_rules() argument
2968 struct ni_ps *ps = ni_get_ps(rps); in si_apply_state_adjust_rules()
3004 if (rps->vce_active) { in si_apply_state_adjust_rules()
3005 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3006 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3007 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3010 rps->evclk = 0; in si_apply_state_adjust_rules()
3011 rps->ecclk = 0; in si_apply_state_adjust_rules()
3018 if (rps->vclk || rps->dclk) { in si_apply_state_adjust_rules()
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| D | ci_dpm.c | 201 static struct ci_ps *ci_get_ps(struct radeon_ps *rps) in ci_get_ps() argument
203 struct ci_ps *ps = rps->ps_priv; in ci_get_ps()
794 struct radeon_ps *rps) in ci_apply_state_adjust_rules() argument
796 struct ci_ps *ps = ci_get_ps(rps); in ci_apply_state_adjust_rules()
803 if (rps->vce_active) { in ci_apply_state_adjust_rules()
804 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
805 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()
807 rps->evclk = 0; in ci_apply_state_adjust_rules()
808 rps->ecclk = 0; in ci_apply_state_adjust_rules()
817 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) in ci_apply_state_adjust_rules()
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| /Linux-v4.19/drivers/staging/comedi/drivers/ |
| D | s626.c | 1282 u32 *rps; in s626_reset_adc() local
1292 rps = (u32 *)devpriv->rps_buf.logical_base; in s626_reset_adc()
1301 *rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC; in s626_reset_adc()
1302 *rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC; in s626_reset_adc()
1314 *rps++ = S626_RPS_LDREG | (S626_P_DEBICMD >> 2); in s626_reset_adc()
1315 *rps++ = S626_DEBI_CMD_WRWORD | S626_LP_GSEL; in s626_reset_adc()
1316 *rps++ = S626_RPS_LDREG | (S626_P_DEBIAD >> 2); in s626_reset_adc()
1318 *rps++ = S626_GSEL_BIPOLAR5V; /* arbitrary immediate data value. */ in s626_reset_adc()
1319 *rps++ = S626_RPS_CLRSIGNAL | S626_RPS_DEBI; in s626_reset_adc()
1322 *rps++ = S626_RPS_UPLOAD | S626_RPS_DEBI; in s626_reset_adc()
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| /Linux-v4.19/Documentation/devicetree/bindings/timer/ |
| D | oxsemi,rps-timer.txt | 5 - compatible: Should be "oxsemi,ox810se-rps-timer" or "oxsemi,ox820-rps-timer"
13 compatible = "oxsemi,ox810se-rps-timer";
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| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 371 static struct kv_ps *kv_get_ps(struct amdgpu_ps *rps) in kv_get_ps() argument
373 struct kv_ps *ps = rps->ps_priv; in kv_get_ps()
1224 struct amdgpu_ps *rps) in kv_update_current_ps() argument
1226 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps()
1229 pi->current_rps = *rps; in kv_update_current_ps()
1236 struct amdgpu_ps *rps) in kv_update_requested_ps() argument
1238 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps()
1241 pi->requested_rps = *rps; in kv_update_requested_ps()
2654 struct amdgpu_ps *rps, in kv_parse_pplib_non_clock_info() argument
2658 struct kv_ps *ps = kv_get_ps(rps); in kv_parse_pplib_non_clock_info()
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| D | si_dpm.c | 1834 static struct si_ps *si_get_ps(struct amdgpu_ps *rps);
3145 struct amdgpu_ps *rps) in ni_update_current_ps() argument
3147 struct si_ps *new_ps = si_get_ps(rps); in ni_update_current_ps()
3151 eg_pi->current_rps = *rps; in ni_update_current_ps()
3158 struct amdgpu_ps *rps) in ni_update_requested_ps() argument
3160 struct si_ps *new_ps = si_get_ps(rps); in ni_update_requested_ps()
3164 eg_pi->requested_rps = *rps; in ni_update_requested_ps()
3426 struct amdgpu_ps *rps) in si_apply_state_adjust_rules() argument
3428 struct si_ps *ps = si_get_ps(rps); in si_apply_state_adjust_rules()
3464 if (rps->vce_active) { in si_apply_state_adjust_rules()
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| D | ci_dpm.c | 326 static struct ci_ps *ci_get_ps(struct amdgpu_ps *rps) in ci_get_ps() argument
328 struct ci_ps *ps = rps->ps_priv; in ci_get_ps()
926 struct amdgpu_ps *rps) in ci_apply_state_adjust_rules() argument
928 struct ci_ps *ps = ci_get_ps(rps); in ci_apply_state_adjust_rules()
935 if (rps->vce_active) { in ci_apply_state_adjust_rules()
936 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
937 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()
939 rps->evclk = 0; in ci_apply_state_adjust_rules()
940 rps->ecclk = 0; in ci_apply_state_adjust_rules()
949 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) in ci_apply_state_adjust_rules()
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| /Linux-v4.19/include/linux/ |
| D | kprobes.h | 371 int register_kretprobes(struct kretprobe **rps, int num);
372 void unregister_kretprobes(struct kretprobe **rps, int num);
418 static inline int register_kretprobes(struct kretprobe **rps, int num) in register_kretprobes() argument
425 static inline void unregister_kretprobes(struct kretprobe **rps, int num) in unregister_kretprobes() argument
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| /Linux-v4.19/kernel/ |
| D | test_kprobes.c | 251 struct kretprobe *rps[2] = {&rp, &rp2}; in test_kretprobes() local
256 ret = register_kretprobes(rps, 2); in test_kretprobes()
275 unregister_kretprobes(rps, 2); in test_kretprobes()
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | ox820.dtsi | 230 rps@400000 {
237 compatible = "oxsemi,ox820-rps-irq", "oxsemi,ox810se-rps-irq";
247 compatible = "oxsemi,ox820-rps-timer";
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| D | ox810se.dtsi | 314 rps@300000 {
321 compatible = "oxsemi,ox810se-rps-irq";
330 compatible = "oxsemi,ox810se-rps-timer";
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