| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | intel_display.c | 135 static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
137 static void ironlake_pch_clock_get(struct intel_crtc *crtc,
143 static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc);
144 static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);
145 static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc);
146 static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
152 static void vlv_prepare_pll(struct intel_crtc *crtc,
154 static void chv_prepare_pll(struct intel_crtc *crtc,
158 static void intel_crtc_init_scalers(struct intel_crtc *crtc,
160 static void skylake_pfit_enable(struct intel_crtc *crtc);
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| D | intel_atomic.c | 224 struct intel_crtc *intel_crtc, in intel_atomic_setup_scalers() argument
252 if (num_scalers_need > intel_crtc->num_scalers){ in intel_atomic_setup_scalers()
254 num_scalers_need, intel_crtc->num_scalers); in intel_atomic_setup_scalers()
270 idx = intel_crtc->base.base.id; in intel_atomic_setup_scalers()
307 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) { in intel_atomic_setup_scalers()
318 for (j = 0; j < intel_crtc->num_scalers; j++) { in intel_atomic_setup_scalers()
323 intel_crtc->pipe, *scaler_id, name, idx); in intel_atomic_setup_scalers()
347 } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { in intel_atomic_setup_scalers()
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| D | intel_dpll_mgr.h | 36 struct intel_crtc;
331 struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
335 struct intel_crtc *crtc,
337 void intel_prepare_shared_dpll(struct intel_crtc *crtc);
338 void intel_enable_shared_dpll(struct intel_crtc *crtc);
339 void intel_disable_shared_dpll(struct intel_crtc *crtc);
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| D | intel_fifo_underrun.c | 54 struct intel_crtc *crtc; in ivb_can_enable_err_int()
73 struct intel_crtc *crtc; in cpt_can_enable_serr_int()
87 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) in i9xx_check_fifo_underruns()
139 static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc) in ivybridge_check_fifo_underruns()
205 static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) in cpt_check_pch_fifo_underruns()
253 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in __intel_set_cpu_fifo_underrun_reporting()
321 struct intel_crtc *crtc = in intel_set_pch_fifo_underrun_reporting()
365 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in intel_cpu_fifo_underrun_irq_handler()
416 struct intel_crtc *crtc; in intel_check_cpu_fifo_underruns()
443 struct intel_crtc *crtc; in intel_check_pch_fifo_underruns()
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| D | intel_fbdev.c | 546 struct intel_crtc *intel_crtc; in intel_fbdev_init_bios() local
553 intel_crtc = to_intel_crtc(crtc); in intel_fbdev_init_bios()
557 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
563 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
578 intel_crtc = to_intel_crtc(crtc); in intel_fbdev_init_bios()
582 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
587 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
594 cur_size = intel_crtc->config->base.adjusted_mode.crtc_hdisplay; in intel_fbdev_init_bios()
598 pipe_name(intel_crtc->pipe), in intel_fbdev_init_bios()
604 cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay; in intel_fbdev_init_bios()
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| D | intel_drv.h | 903 struct intel_crtc { struct
973 struct intel_crtc *crtc);
1000 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
1233 static inline struct intel_crtc *
1239 static inline struct intel_crtc *
1333 struct intel_crtc *crtc) in intel_atomic_get_old_crtc_state()
1341 struct intel_crtc *crtc) in intel_atomic_get_new_crtc_state()
1387 int intel_get_crtc_scanline(struct intel_crtc *crtc);
1406 void hsw_fdi_link_train(struct intel_crtc *crtc,
1480 enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
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| D | intel_color.c | 111 static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc) in ilk_load_ycbcr_conversion_matrix() argument
113 int pipe = intel_crtc->pipe; in ilk_load_ycbcr_conversion_matrix()
114 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in ilk_load_ycbcr_conversion_matrix()
139 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in ilk_load_csc_matrix() local
140 int i, pipe = intel_crtc->pipe; in ilk_load_csc_matrix()
153 ilk_load_ycbcr_conversion_matrix(intel_crtc); in ilk_load_csc_matrix()
319 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i9xx_load_luts_internal() local
320 enum pipe pipe = intel_crtc->pipe; in i9xx_load_luts_internal()
367 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in haswell_load_luts() local
383 I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT); in haswell_load_luts()
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| D | intel_dpio_phy.c | 643 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in chv_set_phy_signal_level() local
645 enum pipe pipe = intel_crtc->pipe; in chv_set_phy_signal_level()
658 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
671 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
679 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
687 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
710 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
724 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
740 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in chv_data_lane_soft_reset()
784 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in chv_phy_pre_pll_enable()
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| D | intel_display.h | 294 #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ argument
298 for_each_if((intel_plane)->pipe == (intel_crtc)->pipe)
300 #define for_each_intel_crtc(dev, intel_crtc) \ argument
301 list_for_each_entry(intel_crtc, \
305 #define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \ argument
306 list_for_each_entry(intel_crtc, \
309 for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base))
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| D | intel_pipe_crc.c | 72 struct intel_crtc *crtc; in i9xx_pipe_crc_auto_source()
336 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A); in hsw_pipe_A_crc_wa()
519 void intel_crtc_enable_pipe_crc(struct intel_crtc *intel_crtc) in intel_crtc_enable_pipe_crc() argument
521 struct drm_crtc *crtc = &intel_crtc->base; in intel_crtc_enable_pipe_crc()
539 void intel_crtc_disable_pipe_crc(struct intel_crtc *intel_crtc) in intel_crtc_disable_pipe_crc() argument
541 struct drm_crtc *crtc = &intel_crtc->base; in intel_crtc_disable_pipe_crc()
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| D | intel_hdmi.c | 214 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in ibx_write_infoframe() local
215 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe()
230 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in ibx_write_infoframe()
235 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in ibx_write_infoframe()
274 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in cpt_write_infoframe() local
275 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe()
293 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in cpt_write_infoframe()
298 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in cpt_write_infoframe()
332 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in vlv_write_infoframe() local
333 i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); in vlv_write_infoframe()
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| D | intel_fbc.c | 415 static bool multiple_pipes_ok(struct intel_crtc *crtc, in multiple_pipes_ok()
483 static int intel_fbc_alloc_cfb(struct intel_crtc *crtc) in intel_fbc_alloc_cfb()
623 static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) in intel_fbc_hw_tracking_covers_screen()
648 static void intel_fbc_update_state_cache(struct intel_crtc *crtc, in intel_fbc_update_state_cache()
689 static bool intel_fbc_can_activate(struct intel_crtc *crtc) in intel_fbc_can_activate()
810 static void intel_fbc_get_reg_params(struct intel_crtc *crtc, in intel_fbc_get_reg_params()
839 void intel_fbc_pre_update(struct intel_crtc *crtc, in intel_fbc_pre_update()
879 struct intel_crtc *crtc = fbc->crtc; in __intel_fbc_disable()
893 static void __intel_fbc_post_update(struct intel_crtc *crtc) in __intel_fbc_post_update()
925 void intel_fbc_post_update(struct intel_crtc *crtc) in intel_fbc_post_update()
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| D | intel_pm.c | 475 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in vlv_get_fifo_size()
826 static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv) in single_enabled_crtc()
828 struct intel_crtc *crtc, *enabled = NULL; in single_enabled_crtc()
841 static void pineview_update_wm(struct intel_crtc *unused_crtc) in pineview_update_wm()
844 struct intel_crtc *crtc; in pineview_update_wm()
1287 static void g4x_invalidate_wms(struct intel_crtc *crtc, in g4x_invalidate_wms()
1314 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in g4x_compute_pipe_wm()
1402 struct intel_crtc *crtc, in g4x_compute_intermediate_wm()
1481 struct intel_crtc *crtc; in g4x_merge_wm()
1547 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in g4x_initial_watermarks()
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| D | intel_audio.c | 304 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in hsw_dp_audio_config_update()
352 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in hsw_hdmi_audio_config_update()
404 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); in hsw_audio_codec_disable()
436 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in hsw_audio_codec_enable()
487 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); in ilk_audio_codec_disable()
533 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in ilk_audio_codec_enable()
622 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_audio_codec_enable()
681 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); in intel_audio_codec_disable()
835 struct intel_crtc *crtc; in i915_audio_component_sync_audio_rate()
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| D | intel_dpll_mgr.c | 134 void intel_prepare_shared_dpll(struct intel_crtc *crtc) in intel_prepare_shared_dpll()
161 void intel_enable_shared_dpll(struct intel_crtc *crtc) in intel_enable_shared_dpll()
206 void intel_disable_shared_dpll(struct intel_crtc *crtc) in intel_disable_shared_dpll()
243 intel_find_shared_dpll(struct intel_crtc *crtc, in intel_find_shared_dpll()
293 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_reference_shared_dpll()
413 struct intel_crtc *crtc; in ibx_pch_dpll_disable()
427 ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, in ibx_get_dpll()
765 struct intel_crtc *crtc, in hsw_ddi_hdmi_get_dpll()
820 hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, in hsw_get_dpll()
1302 static bool skl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc, in skl_ddi_hdmi_pll_dividers()
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| D | i915_debugfs.c | 2923 struct intel_crtc *intel_crtc, in intel_encoder_info() argument
2928 struct drm_crtc *crtc = &intel_crtc->base; in intel_encoder_info()
2951 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_crtc_info() argument
2955 struct drm_crtc *crtc = &intel_crtc->base; in intel_crtc_info()
2967 intel_encoder_info(m, intel_crtc, intel_encoder); in intel_crtc_info()
3110 static void intel_plane_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_plane_info() argument
3116 for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { in intel_plane_info()
3153 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_scaler_info() argument
3156 int num_scalers = intel_crtc->num_scalers; in intel_scaler_info()
3159 pipe_config = to_intel_crtc_state(intel_crtc->base.state); in intel_scaler_info()
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| D | intel_lvds.c | 238 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_pre_enable_lvds()
401 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_lvds_compute_config() local
405 if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) { in intel_lvds_compute_config()
436 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
439 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
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| D | intel_tv.c | 987 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_tv_pre_enable() local
1031 tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe); in intel_tv_pre_enable()
1081 assert_pipe_disabled(dev_priv, intel_crtc->pipe); in intel_tv_pre_enable()
1135 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_tv_detect_type() local
1157 tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe); in intel_tv_detect_type()
1182 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); in intel_tv_detect_type()
1212 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); in intel_tv_detect_type()
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| D | i915_trace.h | 94 TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm),
143 TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm),
183 TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size),
214 TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc),
244 TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc),
270 TP_PROTO(struct intel_crtc *crtc),
296 TP_PROTO(struct intel_crtc *crtc),
321 TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end),
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| D | vlv_dsi.c | 311 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dsi_compute_config()
676 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_dsi_port_enable()
803 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_dsi_pre_enable() local
804 int pipe = intel_crtc->pipe; in intel_dsi_pre_enable()
1098 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in bxt_dsi_get_pipe_config()
1406 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dsi_prepare() local
1414 DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe)); in intel_dsi_prepare()
1441 enum pipe pipe = intel_crtc->pipe; in intel_dsi_prepare()
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| D | intel_ddi.c | 1065 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in icl_pll_to_ddi_pll_sel()
1107 void hsw_fdi_link_train(struct intel_crtc *crtc, in hsw_fdi_link_train()
1251 intel_ddi_get_crtc_encoder(struct intel_crtc *crtc) in intel_ddi_get_crtc_encoder()
1677 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_set_pipe_settings()
1716 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_set_vc_payload_alloc()
1731 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_enable_transcoder_func()
1817 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_disable_transcoder_func()
2048 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_enable_pipe_clock()
2754 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_pre_enable()
3145 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_ddi_get_config() local
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| D | intel_sprite.c | 77 struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); in intel_pipe_update_start()
184 struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); in intel_pipe_update_end()
332 skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in skl_disable_plane()
595 vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in vlv_disable_plane()
761 ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in ivb_disable_plane()
920 g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in g4x_disable_plane()
965 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_check_sprite_plane()
1192 struct intel_crtc *crtc = in intel_sprite_set_colorkey_ioctl()
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| D | i915_drv.h | 402 struct intel_crtc;
416 struct intel_crtc *intel_crtc,
425 void (*update_wm)(struct intel_crtc *crtc);
429 bool (*get_pipe_config)(struct intel_crtc *,
431 void (*get_initial_plane_config)(struct intel_crtc *,
433 int (*crtc_compute_clock)(struct intel_crtc *crtc,
446 void (*fdi_link_train)(struct intel_crtc *crtc,
505 struct intel_crtc *crtc;
1746 struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
1747 struct intel_crtc *pipe_to_crtc_mapping[I915_MAX_PIPES];
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| D | intel_dp.c | 1833 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dp_compute_config() local
1864 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1867 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1940 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dp_prepare()
2526 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in ironlake_edp_pll_on()
2566 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); in ironlake_edp_pll_off()
2708 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dp_get_config()
2975 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_enable_dp()
3107 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in vlv_init_panel_power_sequencer()
3630 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); in intel_dp_link_down()
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| D | intel_crt.c | 155 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_crt_set_dpms()
265 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in hsw_pre_enable_crt()
282 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in hsw_enable_crt()
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