475 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_get_fifo_size()
826 static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)  in single_enabled_crtc()
828 	struct intel_crtc *crtc, *enabled = NULL;  in single_enabled_crtc()
841 static void pineview_update_wm(struct intel_crtc *unused_crtc)  in pineview_update_wm()
844 	struct intel_crtc *crtc;  in pineview_update_wm()
1287 static void g4x_invalidate_wms(struct intel_crtc *crtc,  in g4x_invalidate_wms()
1314 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in g4x_compute_pipe_wm()
1402 				       struct intel_crtc *crtc,  in g4x_compute_intermediate_wm()
1481 	struct intel_crtc *crtc;  in g4x_merge_wm()
1547 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in g4x_initial_watermarks()
1559 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);  in g4x_optimize_watermarks()  local
1565 	intel_crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;  in g4x_optimize_watermarks()
1646 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_compute_fifo()
1727 static void vlv_invalidate_wms(struct intel_crtc *crtc,  in vlv_invalidate_wms()
1833 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_compute_pipe_wm()
1941 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_atomic_update_fifo()
2035 				       struct intel_crtc *crtc,  in vlv_compute_intermediate_wm()
2089 	struct intel_crtc *crtc;  in vlv_merge_wm()
2166 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_initial_watermarks()
2178 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);  in vlv_optimize_watermarks()  local
2184 	intel_crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;  in vlv_optimize_watermarks()
2189 static void i965_update_wm(struct intel_crtc *unused_crtc)  in i965_update_wm()
2192 	struct intel_crtc *crtc;  in i965_update_wm()
2262 static void i9xx_update_wm(struct intel_crtc *unused_crtc)  in i9xx_update_wm()
2271 	struct intel_crtc *crtc, *enabled = NULL;  in i9xx_update_wm()
2405 static void i845_update_wm(struct intel_crtc *unused_crtc)  in i845_update_wm()
2408 	struct intel_crtc *crtc;  in i845_update_wm()
2737 				 const struct intel_crtc *intel_crtc,  in ilk_compute_wm_level()  argument
3054 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);  in ilk_compute_pipe_wm()  local
3098 	ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,  in ilk_compute_pipe_wm()
3112 		ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate,  in ilk_compute_pipe_wm()
3135 				       struct intel_crtc *intel_crtc,  in ilk_compute_intermediate_wm()  argument
3142 		intel_atomic_get_old_crtc_state(intel_state, intel_crtc);  in ilk_compute_intermediate_wm()
3196 	const struct intel_crtc *intel_crtc;  in ilk_merge_wm_level()  local
3200 	for_each_intel_crtc(dev, intel_crtc) {  in ilk_merge_wm_level()
3201 		const struct intel_pipe_wm *active = &intel_crtc->wm.active.ilk;  in ilk_merge_wm_level()
3304 	struct intel_crtc *intel_crtc;  in ilk_compute_wm_results()  local
3349 	for_each_intel_crtc(dev, intel_crtc) {  in ilk_compute_wm_results()
3350 		enum pipe pipe = intel_crtc->pipe;  in ilk_compute_wm_results()
3352 			&intel_crtc->wm.active.ilk.wm[0];  in ilk_compute_wm_results()
3357 		results->wm_linetime[pipe] = intel_crtc->wm.active.ilk.linetime;  in ilk_compute_wm_results()
3706 	struct intel_crtc *crtc;  in intel_can_enable_sagv()
3928 	struct intel_crtc *crtc;  in skl_ddb_get_hw_state()
4042 int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,  in skl_check_pipe_max_pixel_rate()  argument
4045 	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);  in skl_check_pipe_max_pixel_rate()
4281 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_allocate_pipe_ddb()  local
4282 	enum pipe pipe = intel_crtc->pipe;  in skl_allocate_pipe_ddb()
4323 	for_each_plane_id_on_crtc(intel_crtc, plane_id) {  in skl_allocate_pipe_ddb()
4349 	for_each_plane_id_on_crtc(intel_crtc, plane_id) {  in skl_allocate_pipe_ddb()
4746 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);  in skl_compute_wm_levels()  local
4750 	enum pipe pipe = intel_crtc->pipe;  in skl_compute_wm_levels()
4960 static void skl_write_plane_wm(struct intel_crtc *intel_crtc,  in skl_write_plane_wm()  argument
4965 	struct drm_crtc *crtc = &intel_crtc->base;  in skl_write_plane_wm()
4969 	enum pipe pipe = intel_crtc->pipe;  in skl_write_plane_wm()
4997 static void skl_write_cursor_wm(struct intel_crtc *intel_crtc,  in skl_write_cursor_wm()  argument
5001 	struct drm_crtc *crtc = &intel_crtc->base;  in skl_write_cursor_wm()
5005 	enum pipe pipe = intel_crtc->pipe;  in skl_write_cursor_wm()
5093 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_ddb_add_affected_planes()  local
5100 	enum pipe pipe = intel_crtc->pipe;  in skl_ddb_add_affected_planes()
5125 	struct intel_crtc *crtc;  in skl_compute_ddb()
5170 		const struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_print_wm_changes()  local
5171 		enum pipe pipe = intel_crtc->pipe;  in skl_print_wm_changes()
5173 		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {  in skl_print_wm_changes()
5199 	struct intel_crtc *intel_crtc;  in skl_ddb_add_affected_pipes()  local
5271 	for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {  in skl_ddb_add_affected_pipes()
5274 		cstate = intel_atomic_get_crtc_state(state, intel_crtc);  in skl_ddb_add_affected_pipes()
5344 	struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);  in skl_atomic_update_crtc_wm()
5369 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);  in skl_initial_wm()  local
5370 	struct drm_device *dev = intel_crtc->base.dev;  in skl_initial_wm()
5374 	enum pipe pipe = intel_crtc->pipe;  in skl_initial_wm()
5376 	if ((results->dirty_pipes & drm_crtc_mask(&intel_crtc->base)) == 0)  in skl_initial_wm()
5392 	struct intel_crtc *crtc;  in ilk_compute_wm_config()
5444 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);  in ilk_initial_watermarks()  local
5447 	intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate;  in ilk_initial_watermarks()
5456 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);  in ilk_optimize_watermarks()  local
5460 		intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;  in ilk_optimize_watermarks()
5479 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_pipe_wm_get_hw_state()  local
5480 	enum pipe pipe = intel_crtc->pipe;  in skl_pipe_wm_get_hw_state()
5487 	for_each_plane_id_on_crtc(intel_crtc, plane_id) {  in skl_pipe_wm_get_hw_state()
5507 	if (!intel_crtc->active)  in skl_pipe_wm_get_hw_state()
5519 	struct intel_crtc *intel_crtc;  in skl_wm_get_hw_state()  local
5524 		intel_crtc = to_intel_crtc(crtc);  in skl_wm_get_hw_state()
5529 		if (intel_crtc->active)  in skl_wm_get_hw_state()
5551 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_pipe_wm_get_hw_state()  local
5554 	enum pipe pipe = intel_crtc->pipe;  in ilk_pipe_wm_get_hw_state()
5567 	active->pipe_enabled = intel_crtc->active;  in ilk_pipe_wm_get_hw_state()
5595 	intel_crtc->wm.active.ilk = *active;  in ilk_pipe_wm_get_hw_state()
5709 	struct intel_crtc *crtc;  in g4x_wm_get_hw_state()
5793 	struct intel_crtc *crtc;  in g4x_wm_sanitize()
5798 		struct intel_crtc *crtc =  in g4x_wm_sanitize()
5850 	struct intel_crtc *crtc;  in vlv_wm_get_hw_state()
5947 	struct intel_crtc *crtc;  in vlv_wm_sanitize()
5952 		struct intel_crtc *crtc =  in vlv_wm_sanitize()
6074 void intel_update_watermarks(struct intel_crtc *crtc)  in intel_update_watermarks()