Searched refs:dfixed_const (Results 1 – 15 of 15) sorted by relevance
79 tmp.full = dfixed_const(100); in rs690_pm_info()80 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); in rs690_pm_info()83 rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); in rs690_pm_info()85 rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); in rs690_pm_info()88 rdev->pm.igp_system_mclk.full = dfixed_const(400); in rs690_pm_info()89 rdev->pm.igp_ht_link_clk.full = dfixed_const(le16_to_cpu(info->info.usFSBClock)); in rs690_pm_info()90 rdev->pm.igp_ht_link_width.full = dfixed_const(info->info.ucHTLinkWidth); in rs690_pm_info()93 tmp.full = dfixed_const(100); in rs690_pm_info()94 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock)); in rs690_pm_info()97 rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock)); in rs690_pm_info()[all …]
976 a.full = dfixed_const(100); in rv515_crtc_bandwidth_compute()977 sclk.full = dfixed_const(selected_sclk); in rv515_crtc_bandwidth_compute()980 if (crtc->vsc.full > dfixed_const(2)) in rv515_crtc_bandwidth_compute()981 wm->num_line_pair.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()983 wm->num_line_pair.full = dfixed_const(1); in rv515_crtc_bandwidth_compute()985 b.full = dfixed_const(mode->crtc_hdisplay); in rv515_crtc_bandwidth_compute()986 c.full = dfixed_const(256); in rv515_crtc_bandwidth_compute()990 if (a.full < dfixed_const(4)) { in rv515_crtc_bandwidth_compute()1002 a.full = dfixed_const(mode->clock); in rv515_crtc_bandwidth_compute()1003 b.full = dfixed_const(1000); in rv515_crtc_bandwidth_compute()[all …]
1950 a.full = dfixed_const(1000); in evergreen_dram_bandwidth()1951 yclk.full = dfixed_const(wm->yclk); in evergreen_dram_bandwidth()1953 dram_channels.full = dfixed_const(wm->dram_channels * 4); in evergreen_dram_bandwidth()1954 a.full = dfixed_const(10); in evergreen_dram_bandwidth()1955 dram_efficiency.full = dfixed_const(7); in evergreen_dram_bandwidth()1970 a.full = dfixed_const(1000); in evergreen_dram_bandwidth_for_display()1971 yclk.full = dfixed_const(wm->yclk); in evergreen_dram_bandwidth_for_display()1973 dram_channels.full = dfixed_const(wm->dram_channels * 4); in evergreen_dram_bandwidth_for_display()1974 a.full = dfixed_const(10); in evergreen_dram_bandwidth_for_display()1975 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in evergreen_dram_bandwidth_for_display()[all …]
2076 a.full = dfixed_const(1000); in dce6_dram_bandwidth()2077 yclk.full = dfixed_const(wm->yclk); in dce6_dram_bandwidth()2079 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce6_dram_bandwidth()2080 a.full = dfixed_const(10); in dce6_dram_bandwidth()2081 dram_efficiency.full = dfixed_const(7); in dce6_dram_bandwidth()2096 a.full = dfixed_const(1000); in dce6_dram_bandwidth_for_display()2097 yclk.full = dfixed_const(wm->yclk); in dce6_dram_bandwidth_for_display()2099 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce6_dram_bandwidth_for_display()2100 a.full = dfixed_const(10); in dce6_dram_bandwidth_for_display()2101 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce6_dram_bandwidth_for_display()[all …]
3259 temp_ff.full = dfixed_const(temp); in r100_bandwidth_update()3266 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()3267 pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ in r100_bandwidth_update()3269 temp_ff.full = dfixed_const(pixel_bytes1); in r100_bandwidth_update()3273 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()3274 pix_clk2.full = dfixed_const(mode2->clock); /* convert to fixed point */ in r100_bandwidth_update()3276 temp_ff.full = dfixed_const(pixel_bytes2); in r100_bandwidth_update()3322 trcd_ff.full = dfixed_const(mem_trcd); in r100_bandwidth_update()3323 trp_ff.full = dfixed_const(mem_trp); in r100_bandwidth_update()3324 tras_ff.full = dfixed_const(mem_tras); in r100_bandwidth_update()[all …]
8947 a.full = dfixed_const(1000); in dce8_dram_bandwidth()8948 yclk.full = dfixed_const(wm->yclk); in dce8_dram_bandwidth()8950 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce8_dram_bandwidth()8951 a.full = dfixed_const(10); in dce8_dram_bandwidth()8952 dram_efficiency.full = dfixed_const(7); in dce8_dram_bandwidth()8976 a.full = dfixed_const(1000); in dce8_dram_bandwidth_for_display()8977 yclk.full = dfixed_const(wm->yclk); in dce8_dram_bandwidth_for_display()8979 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce8_dram_bandwidth_for_display()8980 a.full = dfixed_const(10); in dce8_dram_bandwidth_for_display()8981 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce8_dram_bandwidth_for_display()[all …]
1754 a.full = dfixed_const(src_v); in radeon_crtc_scaling_mode_fixup()1755 b.full = dfixed_const(dst_v); in radeon_crtc_scaling_mode_fixup()1757 a.full = dfixed_const(src_h); in radeon_crtc_scaling_mode_fixup()1758 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()1761 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()1762 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
723 a.full = dfixed_const(100); in radeon_update_bandwidth_info()724 rdev->pm.sclk.full = dfixed_const(sclk); in radeon_update_bandwidth_info()726 rdev->pm.mclk.full = dfixed_const(mclk); in radeon_update_bandwidth_info()730 a.full = dfixed_const(16); in radeon_update_bandwidth_info()
35 #define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ macro40 #define dfixed_init(A) { .full = dfixed_const((A)) }49 return dfixed_const(non_frac); in dfixed_floor()56 if (A.full > dfixed_const(non_frac)) in dfixed_ceil()57 return dfixed_const(non_frac + 1); in dfixed_ceil()59 return dfixed_const(non_frac); in dfixed_ceil()
510 a.full = dfixed_const(1000); in dce_v6_0_dram_bandwidth()511 yclk.full = dfixed_const(wm->yclk); in dce_v6_0_dram_bandwidth()513 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v6_0_dram_bandwidth()514 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth()515 dram_efficiency.full = dfixed_const(7); in dce_v6_0_dram_bandwidth()539 a.full = dfixed_const(1000); in dce_v6_0_dram_bandwidth_for_display()540 yclk.full = dfixed_const(wm->yclk); in dce_v6_0_dram_bandwidth_for_display()542 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v6_0_dram_bandwidth_for_display()543 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth_for_display()544 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v6_0_dram_bandwidth_for_display()[all …]
648 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth()649 yclk.full = dfixed_const(wm->yclk); in dce_v8_0_dram_bandwidth()651 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v8_0_dram_bandwidth()652 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth()653 dram_efficiency.full = dfixed_const(7); in dce_v8_0_dram_bandwidth()677 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth_for_display()678 yclk.full = dfixed_const(wm->yclk); in dce_v8_0_dram_bandwidth_for_display()680 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v8_0_dram_bandwidth_for_display()681 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth_for_display()682 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v8_0_dram_bandwidth_for_display()[all …]
739 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth()740 yclk.full = dfixed_const(wm->yclk); in dce_v11_0_dram_bandwidth()742 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v11_0_dram_bandwidth()743 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth()744 dram_efficiency.full = dfixed_const(7); in dce_v11_0_dram_bandwidth()768 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth_for_display()769 yclk.full = dfixed_const(wm->yclk); in dce_v11_0_dram_bandwidth_for_display()771 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v11_0_dram_bandwidth_for_display()772 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth_for_display()773 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v11_0_dram_bandwidth_for_display()[all …]
713 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth()714 yclk.full = dfixed_const(wm->yclk); in dce_v10_0_dram_bandwidth()716 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v10_0_dram_bandwidth()717 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth()718 dram_efficiency.full = dfixed_const(7); in dce_v10_0_dram_bandwidth()742 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth_for_display()743 yclk.full = dfixed_const(wm->yclk); in dce_v10_0_dram_bandwidth_for_display()745 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v10_0_dram_bandwidth_for_display()746 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth_for_display()747 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v10_0_dram_bandwidth_for_display()[all …]
717 a.full = dfixed_const(src_v); in amdgpu_display_crtc_scaling_mode_fixup()718 b.full = dfixed_const(dst_v); in amdgpu_display_crtc_scaling_mode_fixup()720 a.full = dfixed_const(src_h); in amdgpu_display_crtc_scaling_mode_fixup()721 b.full = dfixed_const(dst_h); in amdgpu_display_crtc_scaling_mode_fixup()724 amdgpu_crtc->vsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()725 amdgpu_crtc->hsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()
140 outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1)); in compute_dda_inc()141 inf.full -= dfixed_const(1); in compute_dda_inc()144 dda_inc = min_t(u32, dda_inc, dfixed_const(max)); in compute_dda_inc()
