| /Linux-v4.19/tools/perf/Documentation/ |
| D | perf-c2c.txt | 29 for cachelines with highest contention - highest number of HITM accesses.
159 - sum of all cachelines accesses
162 - cacheline percentage of all Remote/Local HITM accesses
168 Total - all store accesses
169 L1Hit - store accesses that hit L1
170 L1Hit - store accesses that missed L1
173 - count of local and remote DRAM accesses
176 - count of all accesses that missed LLC
179 - sum of all load accesses
190 - % of Remote/Local HITM accesses for given offset within cacheline
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| /Linux-v4.19/Documentation/i2c/ |
| D | i2c-topology | 136 This means that accesses to D2 are lockout out for the full duration
137 of the entire operation. But accesses to D3 are possibly interleaved
196 This means that accesses to both D2 and D3 are locked out for the full
241 When device D1 is accessed, accesses to D2 are locked out for the
243 are locked). But accesses to D3 and D4 are possibly interleaved at
244 any point. Accesses to D3 locks out D1 and D2, but accesses to D4
262 When device D1 is accessed, accesses to D2 and D3 are locked out
264 root adapter). But accesses to D4 are possibly interleaved at any
275 mux. In that case, any interleaved accesses to D4 might close M2
296 When D1 is accessed, accesses to D2 are locked out for the full
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| /Linux-v4.19/drivers/acpi/acpica/ |
| D | exprep.c | 65 u32 accesses; in acpi_ex_generate_access() local
115 accesses = field_end_offset - field_start_offset; in acpi_ex_generate_access()
124 accesses)); in acpi_ex_generate_access()
128 if (accesses <= 1) { in acpi_ex_generate_access()
140 if (accesses < minimum_accesses) { in acpi_ex_generate_access()
141 minimum_accesses = accesses; in acpi_ex_generate_access()
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| /Linux-v4.19/Documentation/ |
| D | unaligned-memory-access.txt | 15 unaligned accesses, why you need to write code that doesn't cause them,
22 Unaligned memory accesses occur when you try to read N bytes of data starting
59 - Some architectures are able to perform unaligned memory accesses
61 - Some architectures raise processor exceptions when unaligned accesses
64 - Some architectures raise processor exceptions when unaligned accesses
72 memory accesses to happen, your code will not work correctly on certain
103 to pad structures so that accesses to fields are suitably aligned (assuming
136 lead to unaligned accesses when accessing fields that do not satisfy
183 Here is another example of some code that could cause unaligned accesses::
192 This code will cause unaligned accesses every time the data parameter points
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| D | memory-barriers.txt | 77 - Acquires vs memory accesses.
78 - Acquires vs I/O accesses.
158 The set of accesses as seen by the memory system in the middle can be arranged
231 (*) On any given CPU, dependent memory accesses will be issued in order, with
291 (*) It _must_ be assumed that overlapping memory accesses may be merged or
499 an ACQUIRE on a given variable, all memory accesses preceding any prior
501 words, within a given variable's critical section, all accesses of all
530 (*) There is no guarantee that any of the memory accesses specified before a
533 access queue that accesses of the appropriate type may not cross.
538 of the first CPU's accesses occur, but see the next point:
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| /Linux-v4.19/lib/ |
| D | Kconfig.kasan | 14 designed to find out-of-bounds accesses and use-after-free bugs.
16 of 4.9.2 or later. Detection of out of bounds accesses to stack or
53 memory accesses. This is faster than outline (in some workloads
65 out of bounds accesses, use after free. It is useful for testing
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| D | Kconfig.ubsan | 35 This option enables detection of unaligned memory accesses.
37 accesses may produce a lot of false positives.
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| /Linux-v4.19/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 13 - big-endian: Boolean; force big endian register accesses
16 - little-endian: Boolean; force little endian register accesses
19 - native-endian: Boolean; always use register accesses matched to the
31 readl/writel for MMIO accesses.
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| /Linux-v4.19/Documentation/devicetree/bindings/mtd/ |
| D | gpio-control-nand.txt | 10 resource describes the data bus connected to the NAND flash and all accesses
23 location used to guard against bus reordering with regards to accesses to
26 read to ensure that the GPIO accesses have completed.
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| /Linux-v4.19/tools/memory-model/litmus-tests/ |
| D | MP+porevlocks.litmus | 9 * given lock), a CPU is not only guaranteed to see the accesses that other
11 * see all prior accesses by those other CPUs.
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| D | MP+polocks.litmus | 9 * given lock), a CPU is not only guaranteed to see the accesses that other
11 * to see all prior accesses by those other CPUs.
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| /Linux-v4.19/arch/mips/kvm/ |
| D | Kconfig | 66 bool "Maintain counters for COP0 accesses"
69 Maintain statistics for Guest COP0 accesses.
70 A histogram of COP0 accesses is printed when the VM is
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| /Linux-v4.19/Documentation/hwmon/ |
| D | w83627hf | 5 * Winbond W83627HF (ISA accesses ONLY)
41 This driver implements support for ISA accesses *only* for
45 This driver supports ISA accesses, which should be more reliable
46 than i2c accesses. Also, for Tyan boards which contain both a
51 If you really want i2c accesses for these Super I/O chips,
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| /Linux-v4.19/tools/memory-model/Documentation/ |
| D | cheatsheet.txt | 29 SELF: Orders self, as opposed to accesses before and/or after
30 SV: Orders later accesses to the same variable
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| D | recipes.txt | 32 compiler can emit whatever code it likes for normal accesses,
39 must be properly aligned and all accesses to that variable must
41 your full-ordering warranty, as do undersized accesses that load
44 4. If there are multiple CPUs, accesses to shared variables should
125 However, it is not necessarily the case that accesses ordered by
232 The smp_store_release() macro orders any prior accesses against the
234 subsequent accesses. Therefore, if the final value of r0 is the value 1,
274 against later accesses that depend on the value loaded. A dependency
528 based on the relation between the accesses linking successive CPUs in a
551 linking the memory accesses for the outcome in question:
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| /Linux-v4.19/Documentation/driver-api/ |
| D | device-io.rst | 30 part of the CPU's address space is interpreted not as accesses to
31 memory, but as accesses to a device. Some architectures define devices
54 historical accident, these are named byte, word, long and quad accesses.
55 Both read and write accesses are supported; there is no prefetch support
172 addresses is generally not as fast as accesses to the memory mapped
182 allow 8-bit, 16-bit and 32-bit accesses; also known as byte, word and
188 that accesses to their ports are slowed down. This functionality is
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| /Linux-v4.19/Documentation/process/ |
| D | volatile-considered-harmful.rst | 39 meaning that data accesses will not be optimized across them. So the
43 accesses to that data.
53 registers. Within the kernel, register accesses, too, should be protected
55 accesses within a critical section. But, within the kernel, I/O memory
56 accesses are always done through accessor functions; accessing I/O memory
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| /Linux-v4.19/Documentation/devicetree/bindings/pci/ |
| D | designware-pcie-ecam.txt | 8 to reconfigure ATU windows for config and/or IO space accesses at runtime.
12 requires special config space accessors that filter accesses to device #1
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| /Linux-v4.19/Documentation/devicetree/bindings/thermal/ |
| D | mediatek-thermal.txt | 5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
7 apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
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| /Linux-v4.19/Documentation/devicetree/bindings/iommu/ |
| D | msm,iommu-v0.txt | 27 required for iommu's register accesses.
29 required by iommu for bus accesses.
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| /Linux-v4.19/Documentation/dev-tools/ |
| D | ubsan.rst | 78 Detection of unaligned accesses controlled through the separate option -
80 unaligned accesses (CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y). One could
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| /Linux-v4.19/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-sdram-edac.txt | 2 The EDAC accesses a range of registers in the SDRAM controller.
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| /Linux-v4.19/Documentation/devicetree/bindings/serial/ |
| D | 8250.txt | 40 - reg-io-width : the size (in bytes) of the IO accesses that should be
42 accesses to the UART (e.g. TI davinci).
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| /Linux-v4.19/Documentation/admin-guide/mm/ |
| D | idle_page_tracking.rst | 39 Only accesses to user memory pages are tracked. These are pages mapped to a
61 2. Wait until the workload accesses its working set.
82 The kernel internally keeps track of accesses to user memory pages in order to
108 mapped to, otherwise we will not be able to detect accesses to the page coming
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| /Linux-v4.19/Documentation/devicetree/bindings/memory-controllers/ |
| D | omap-gpmc.txt | 86 - gpmc,bus-turnaround-ns: Turn-around time between successive accesses
97 accesses to a different CS
99 accesses to the same CS
106 burst accesses, defines the number of
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