Searched refs:SCLK_I2S0 (Results 1 – 22 of 22) sorted by relevance
| /Linux-v4.19/include/dt-bindings/clock/ |
| D | s3c2443.h | 35 #define SCLK_I2S0 18 macro
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| D | rk3188-cru-common.h | 40 #define SCLK_I2S0 75 macro
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| D | rk3128-cru.h | 37 #define SCLK_I2S0 80 macro
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| D | rk3228-cru.h | 36 #define SCLK_I2S0 80 macro
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| D | rv1108-cru.h | 34 #define SCLK_I2S0 75 macro
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| D | rk3288-cru.h | 46 #define SCLK_I2S0 82 macro
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| D | rk3328-cru.h | 39 #define SCLK_I2S0 41 macro
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| /Linux-v4.19/Documentation/devicetree/bindings/sound/ |
| D | rockchip-i2s.txt | 46 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| /Linux-v4.19/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 156 GATE(SCLK_I2S0, "sclk_i2s0", "mux_i2s0", SCLKCON, 9, 0, 0),
215 ALIAS(SCLK_I2S0, NULL, "i2s-if"),
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | rk3288-veyron-mickey.dts | 142 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
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| D | rk3288-firefly-reload.dts | 222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| D | rk3188.dtsi | 99 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| D | rk3066a.dtsi | 70 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| D | rk322x.dtsi | 168 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
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| D | rk3288.dtsi | 951 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| /Linux-v4.19/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 554 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, 0,
678 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3128.c | 371 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3228.c | 432 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3328.c | 384 GATE(SCLK_I2S0, "clk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rv1108.c | 516 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3288.c | 352 GATE(SCLK_I2S0, "sclk_i2s0", "i2s_pre", CLK_SET_RATE_PARENT,
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| /Linux-v4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3328.dtsi | 178 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
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