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Searched refs:SCLK_EMMC (Results 1 – 25 of 29) sorted by relevance

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/Linux-v4.19/Documentation/devicetree/bindings/mmc/
Darasan,sdhci.txt68 clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
71 assigned-clocks = <&cru SCLK_EMMC>;
/Linux-v4.19/include/dt-bindings/clock/
Drk3036-cru.h30 #define SCLK_EMMC 71 macro
Drk3188-cru-common.h39 #define SCLK_EMMC 74 macro
Drk3128-cru.h33 #define SCLK_EMMC 71 macro
Drk3228-cru.h31 #define SCLK_EMMC 71 macro
Drv1108-cru.h30 #define SCLK_EMMC 71 macro
Dpx30-cru.h59 #define SCLK_EMMC 57 macro
Drk3288-cru.h35 #define SCLK_EMMC 71 macro
Drk3328-cru.h33 #define SCLK_EMMC 35 macro
Drk3368-cru.h35 #define SCLK_EMMC 71 macro
Drk3399-cru.h44 #define SCLK_EMMC 78 macro
/Linux-v4.19/drivers/clk/rockchip/
Dclk-rk3036.c301 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
Dclk-rk3128.c334 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
Dclk-rk3228.c403 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
Dclk-rk3188.c410 COMPOSITE_NOMUX(SCLK_EMMC, "sclk_emmc", "hclk_peri", 0,
Dclk-rk3328.c638 COMPOSITE(SCLK_EMMC, "clk_emmc", mux_2plls_24m_u480m_p, 0,
Dclk-rv1108.c736 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
Dclk-rk3368.c558 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
Dclk-rk3288.c519 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
Dclk-px30.c479 COMPOSITE(SCLK_EMMC, "clk_emmc", mux_gpll_cpll_npll_xin24m_p, 0,
Dclk-rk3399.c930 COMPOSITE(SCLK_EMMC, "clk_emmc", mux_pll_src_cpll_gpll_npll_upll_24m_p, 0,
/Linux-v4.19/arch/arm/boot/dts/
Drk3xxx.dtsi226 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
Drk3036.dtsi263 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
Drv1108.dtsi446 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
Drk322x.dtsi623 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,

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