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Searched refs:REG_OFFSET (Results 1 – 22 of 22) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/gma500/
Dmdfld_dsi_output.h86 #define REG_OFFSET(pipe) (CHECK_PIPE(pipe) * 0x400) macro
89 #define MIPI_DEVICE_READY_REG(pipe) (0xb000 + REG_OFFSET(pipe))
90 #define MIPI_INTR_STAT_REG(pipe) (0xb004 + REG_OFFSET(pipe))
91 #define MIPI_INTR_EN_REG(pipe) (0xb008 + REG_OFFSET(pipe))
92 #define MIPI_DSI_FUNC_PRG_REG(pipe) (0xb00c + REG_OFFSET(pipe))
93 #define MIPI_HS_TX_TIMEOUT_REG(pipe) (0xb010 + REG_OFFSET(pipe))
94 #define MIPI_LP_RX_TIMEOUT_REG(pipe) (0xb014 + REG_OFFSET(pipe))
95 #define MIPI_TURN_AROUND_TIMEOUT_REG(pipe) (0xb018 + REG_OFFSET(pipe))
96 #define MIPI_DEVICE_RESET_TIMER_REG(pipe) (0xb01c + REG_OFFSET(pipe))
97 #define MIPI_DPI_RESOLUTION_REG(pipe) (0xb020 + REG_OFFSET(pipe))
[all …]
/Linux-v4.19/arch/arm64/kvm/
Dregmap.c28 #define REG_OFFSET(_reg) \ macro
31 #define USR_REG_OFFSET(R) REG_OFFSET(compat_usr(R))
41 REG_OFFSET(pc)
49 REG_OFFSET(compat_r8_fiq), /* r8 */
50 REG_OFFSET(compat_r9_fiq), /* r9 */
51 REG_OFFSET(compat_r10_fiq), /* r10 */
52 REG_OFFSET(compat_r11_fiq), /* r11 */
53 REG_OFFSET(compat_r12_fiq), /* r12 */
54 REG_OFFSET(compat_sp_fiq), /* r13 */
55 REG_OFFSET(compat_lr_fiq), /* r14 */
[all …]
/Linux-v4.19/arch/arm/kvm/
Demulate.c35 #define REG_OFFSET(_reg) \ macro
38 #define USR_REG_OFFSET(_num) REG_OFFSET(usr_regs.uregs[_num])
55 REG_OFFSET(fiq_regs[0]), /* r8 */
56 REG_OFFSET(fiq_regs[1]), /* r9 */
57 REG_OFFSET(fiq_regs[2]), /* r10 */
58 REG_OFFSET(fiq_regs[3]), /* r11 */
59 REG_OFFSET(fiq_regs[4]), /* r12 */
60 REG_OFFSET(fiq_regs[5]), /* r13 */
61 REG_OFFSET(fiq_regs[6]), /* r14 */
71 REG_OFFSET(irq_regs[0]), /* r13 */
[all …]
/Linux-v4.19/arch/mips/ar7/
Dirq.c32 #define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) macro
35 #define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
37 #define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
39 #define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
43 #define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
44 #define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
/Linux-v4.19/arch/arm/mach-ixp4xx/
Dgtwx5715-setup.c83 #define REG_OFFSET 3 macro
85 #define REG_OFFSET 0 macro
110 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dcoyote-setup.c65 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
102 (char*)(IXP4XX_UART1_BASE_VIRT + REG_OFFSET); in coyote_init()
Davila-setup.c87 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
96 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Ddsmg600-setup.c135 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
144 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Domixp-setup.c128 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
136 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
Dvulcan-setup.c82 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
91 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dnas100d-setup.c138 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
147 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dnslu2-setup.c150 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
159 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dfsg-setup.c98 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
107 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dixdp425-setup.c160 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
169 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dwg302v2-setup.c60 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dgateway7001-setup.c59 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dgoramo_mlr.c243 REG_OFFSET,
253 REG_OFFSET,
/Linux-v4.19/arch/ia64/hp/sim/boot/
Dfw-emu.c107 #define REG_OFFSET(addr) (0x00000000000000FF & (addr)) macro
203 r9 = inb(0xCFC + ((REG_OFFSET(in1) & 3))); in sal_emulator()
205 r9 = inw(0xCFC + ((REG_OFFSET(in1) & 2))); in sal_emulator()
217 outb(in3, 0xCFC + ((REG_OFFSET(in1) & 3))); in sal_emulator()
219 outw(in3, 0xCFC + ((REG_OFFSET(in1) & 2))); in sal_emulator()
/Linux-v4.19/arch/arm/mach-ixp4xx/include/mach/
Dplatform.h22 #define REG_OFFSET 0 macro
24 #define REG_OFFSET 3 macro
/Linux-v4.19/drivers/rtc/
Drtc-pcf8523.c38 #define REG_OFFSET 0x0e macro
285 err = pcf8523_read(client, REG_OFFSET, &value); in pcf8523_rtc_read_offset()
310 return pcf8523_write(client, REG_OFFSET, value); in pcf8523_rtc_set_offset()
/Linux-v4.19/drivers/pinctrl/spear/
Dpinctrl-plgpio.c26 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ macro
83 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in is_plgpio_set()
92 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_set()
101 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_reset()
340 reg_off = REG_OFFSET(plgpio->base, plgpio->regs.eit, offset); in plgpio_irq_set_type()
/Linux-v4.19/sound/soc/sh/
Dsiu_dai.c35 #define REG_OFFSET 0xc000 macro
763 info->reg = devm_ioremap(&pdev->dev, res->start + REG_OFFSET, in siu_probe()
764 resource_size(res) - REG_OFFSET); in siu_probe()