| /Linux-v4.19/include/dt-bindings/clock/ |
| D | rk3036-cru.h | 22 #define PLL_GPLL 3 macro
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| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
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| D | rk3128-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3228-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rv1108-cru.h | 22 #define PLL_GPLL 2 macro
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| D | px30-cru.h | 180 #define PLL_GPLL 1 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3328-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| D | rk3399-cru.h | 24 #define PLL_GPLL 5 macro
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| /Linux-v4.19/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 228 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
239 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3036.c | 147 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3128.c | 172 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3228.c | 183 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
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| D | clk-rk3328.c | 231 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
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| D | clk-rv1108.c | 166 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),
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| D | clk-rk3368.c | 146 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
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| D | clk-rk3288.c | 214 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
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| D | clk-px30.c | 203 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0),
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| D | clk-rk3399.c | 233 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RK3399_PLL_CON(32),
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | rk3066a.dtsi | 117 assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
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| D | rk3036.dtsi | 301 assigned-clocks = <&cru PLL_GPLL>;
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| D | rk322x.dtsi | 454 <&cru PLL_GPLL>, <&cru ARMCLK>,
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| /Linux-v4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3328.dtsi | 638 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
645 <&cru PLL_GPLL>, <&xin24m>,
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| D | rk3399-gru.dtsi | 354 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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