Searched refs:PHY_RESET (Results 1 – 9 of 9) sorted by relevance
24 #define PHY_RESET BIT(0) macro88 REF_SSP_EN | PHY_RESET; in hix5hd2_sata_phy_init()91 val &= ~PHY_RESET; in hix5hd2_sata_phy_init()
194 writel(((val & ~PHY_RESET) | PHY_RESET), phy->base + in emac_sgmii_reset_prepare()199 writel((val & ~PHY_RESET), phy->base + EMAC_EMAC_WRAPPER_CSR2); in emac_sgmii_reset_prepare()
180 #define PHY_RESET BIT(0) macro
50 #define PHY_RESET (1 << 5) macro
91 reg |= PHY_RESET; in bcm_sf2_gphy_enable_set()96 reg &= ~PHY_RESET; in bcm_sf2_gphy_enable_set()98 reg |= EXT_PWR_DOWN | IDDQ_BIAS | PHY_RESET; in bcm_sf2_gphy_enable_set()
88 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */
606 PHY_RESET, enumerator3025 set_bit(PHY_RESET, &tp->flags); in r8152b_hw_phy_cfg()3309 set_bit(PHY_RESET, &tp->flags); in r8153_hw_phy_cfg()3403 set_bit(PHY_RESET, &tp->flags); in r8153b_hw_phy_cfg()3636 if (test_and_clear_bit(PHY_RESET, &tp->flags)) in rtl8152_set_speed()
1595 #define PHY_RESET 0x02 macro
285 #define PHY_RESET 0x8000 macro
