1/* 2 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix 3 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13#include "imx53.dtsi" 14 15/ { 16 model = "TQ TQMa53"; 17 compatible = "tq,tqma53", "fsl,imx53"; 18 19 memory@70000000 { 20 reg = <0x70000000 0x40000000>; /* Up to 1GiB */ 21 }; 22 23 regulators { 24 compatible = "simple-bus"; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 reg_3p3v: regulator@0 { 29 compatible = "regulator-fixed"; 30 reg = <0>; 31 regulator-name = "3P3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 regulator-always-on; 35 }; 36 }; 37}; 38 39&esdhc2 { 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_esdhc2>, 42 <&pinctrl_esdhc2_cdwp>; 43 vmmc-supply = <®_3p3v>; 44 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 45 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 46 status = "disabled"; 47}; 48 49&uart3 { 50 pinctrl-names = "default"; 51 pinctrl-0 = <&pinctrl_uart3>; 52 status = "disabled"; 53}; 54 55&ecspi1 { 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_ecspi1>; 58 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>, 59 <&gpio3 24 0>, <&gpio3 25 0>; 60 status = "disabled"; 61}; 62 63&esdhc3 { /* EMMC */ 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_esdhc3>; 66 vmmc-supply = <®_3p3v>; 67 non-removable; 68 bus-width = <8>; 69 status = "okay"; 70}; 71 72&iomuxc { 73 pinctrl-names = "default"; 74 pinctrl-0 = <&pinctrl_hog>; 75 76 imx53-tqma53 { 77 pinctrl_hog: hoggrp { 78 fsl,pins = < 79 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */ 80 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */ 81 MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */ 82 MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */ 83 MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */ 84 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */ 85 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */ 86 MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* #SYSTEM_DOWN */ 87 MX53_PAD_GPIO_3__GPIO1_3 0x80000000 88 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */ 89 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 /* LCD_CONTRAST */ 90 >; 91 }; 92 93 pinctrl_audmux: audmuxgrp { 94 fsl,pins = < 95 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 96 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 97 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 98 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 99 >; 100 }; 101 102 pinctrl_can1: can1grp { 103 fsl,pins = < 104 MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000 105 MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000 106 >; 107 }; 108 109 pinctrl_can2: can2grp { 110 fsl,pins = < 111 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 112 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 113 >; 114 }; 115 116 pinctrl_cspi: cspigrp { 117 fsl,pins = < 118 MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5 119 MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5 120 MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5 121 >; 122 }; 123 124 pinctrl_ecspi1: ecspi1grp { 125 fsl,pins = < 126 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 127 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 128 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 129 >; 130 }; 131 132 pinctrl_esdhc2: esdhc2grp { 133 fsl,pins = < 134 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 135 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 136 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 137 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 138 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 139 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 140 >; 141 }; 142 143 pinctrl_esdhc2_cdwp: esdhc2cdwp { 144 fsl,pins = < 145 MX53_PAD_GPIO_4__GPIO1_4 0x80000000 /* SD2_CD */ 146 MX53_PAD_GPIO_2__GPIO1_2 0x80000000 /* SD2_WP */ 147 >; 148 }; 149 150 pinctrl_esdhc3: esdhc3grp { 151 fsl,pins = < 152 MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 153 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 154 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 155 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 156 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 157 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 158 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 159 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 160 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 161 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 162 >; 163 }; 164 165 pinctrl_fec: fecgrp { 166 fsl,pins = < 167 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 168 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 169 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 170 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 171 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 172 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 173 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 174 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 175 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 176 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 177 >; 178 }; 179 180 pinctrl_i2c2: i2c2grp { 181 fsl,pins = < 182 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 183 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 184 >; 185 }; 186 187 pinctrl_i2c3: i2c3grp { 188 fsl,pins = < 189 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 190 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 191 >; 192 }; 193 194 pinctrl_uart1: uart1grp { 195 fsl,pins = < 196 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 197 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 198 >; 199 }; 200 201 pinctrl_uart2: uart2grp { 202 fsl,pins = < 203 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 204 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 205 >; 206 }; 207 208 pinctrl_uart3: uart3grp { 209 fsl,pins = < 210 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 211 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 212 >; 213 }; 214 }; 215}; 216 217&uart1 { 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_uart1>; 220 uart-has-rtscts; 221 status = "disabled"; 222}; 223 224&uart2 { 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pinctrl_uart2>; 227 status = "disabled"; 228}; 229 230&can1 { 231 pinctrl-names = "default"; 232 pinctrl-0 = <&pinctrl_can1>; 233 status = "disabled"; 234}; 235 236&can2 { 237 pinctrl-names = "default"; 238 pinctrl-0 = <&pinctrl_can2>; 239 status = "disabled"; 240}; 241 242&i2c3 { 243 pinctrl-names = "default"; 244 pinctrl-0 = <&pinctrl_i2c3>; 245 status = "disabled"; 246}; 247 248&cspi { 249 pinctrl-names = "default"; 250 pinctrl-0 = <&pinctrl_cspi>; 251 cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>, 252 <&gpio1 21 0>; 253 status = "disabled"; 254}; 255 256&i2c2 { 257 pinctrl-names = "default"; 258 pinctrl-0 = <&pinctrl_i2c2>; 259 status = "okay"; 260 261 pmic: mc34708@8 { 262 compatible = "fsl,mc34708"; 263 reg = <0x8>; 264 fsl,mc13xxx-uses-rtc; 265 interrupt-parent = <&gpio2>; 266 interrupts = <6 4>; /* PATA_DATA6, active high */ 267 }; 268 269 sensor1: lm75@48 { 270 compatible = "lm75"; 271 reg = <0x48>; 272 }; 273 274 eeprom: 24c64@50 { 275 compatible = "atmel,24c64"; 276 pagesize = <32>; 277 reg = <0x50>; 278 }; 279}; 280 281&fec { 282 pinctrl-names = "default"; 283 pinctrl-0 = <&pinctrl_fec>; 284 phy-mode = "rmii"; 285 status = "disabled"; 286}; 287