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/Linux-v4.19/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.txt19 the MC control register region.
24 defining the MC's registers:
29 -the second region is the MC control registers. This
36 handling message interrupts for the MC.
41 MC address space and the parent system address space.
43 The MC address space is defined by 3 components:
47 0x0 - MC portals
61 the relationship between the Ethernet MACs which belong to the MC
96 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
97 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
[all …]
/Linux-v4.19/Documentation/networking/dpaa2/
Doverview.rst22 A DPAA2 hardware component called the Management Complex (or MC) manages the
23 DPAA2 hardware resources. The MC provides an object-based abstraction for
25 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
28 The MC provides memory-mapped I/O command interfaces (MC portals)
48 | | Management Complex (MC) | |
61 | -MC portals ... |
67 The MC mediates operations such as create, discover,
70 the MC and are done directly using memory mapped regions in
121 A DPRC has a mappable MMIO region (an MC portal) that can be used
122 to send MC commands. It has an interrupt for status events (like
[all …]
/Linux-v4.19/drivers/staging/fsl-dpaa2/ethsw/
DREADME25 configured via the Management Complex (MC) portals. MC abstracts most of
49 | MC hardware portals |
86 A device is created for the switch objects probed on the MC bus. Each DPSW
91 be added to a container on the MC bus in one of two ways: statically,
92 through a Datapath Layout Binary file (DPL) that is parsed by MC at boot
DTODO6 * MC firmware uprev; the DPAA2 objects used by the Ethernet Switch driver
7 need to be kept in sync with binary interface changes in MC
/Linux-v4.19/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-mc.txt1 NVIDIA Tegra20 MC(Memory Controller)
6 example below. Note that the MC registers are interleaved with the
8 - interrupts : Should contain MC General interrupt.
Dnvidia,tegra30-mc.txt43 (see section "15.6.1 MC Registers" in the TRM), these are the registers whose values need to be
/Linux-v4.19/drivers/staging/fsl-dpaa2/ethernet/
Dethernet-driver.rst30 Complex (MC) portals. MC abstracts most of these resources as DPAA2 objects
32 hardware resources, like queues, do not have a corresponding MC object and
59 | MC hardware portals |
130 managed by MC and completely transparent to the Ethernet driver.
156 A net device is created for each DPNI object probed on the MC bus. Each DPNI has
161 added to a container on the MC bus in one of two ways: statically, through a
162 Datapath Layout Binary file (DPL) that is parsed by MC at boot time; or created
DTODO2 the DPMAC objects and their link to DPNIs are handled by MC internally
6 * MC firmware uprev; the DPAA2 objects used by the Ethernet driver need to
7 be kept in sync with binary interface changes in MC
/Linux-v4.19/Documentation/devicetree/bindings/perf/
Dapm-xgene-pmu.txt9 MC - Memory controller
35 Required properties for MC subnode:
37 - reg : First resource shall be the MC PMU resource.
38 - enable-bit-index : The bit indicates if the according MC is enabled.
/Linux-v4.19/drivers/char/
Dhpet.c59 #define write_counter(V, MC) writeq(V, MC) argument
60 #define read_counter(MC) readq(MC) argument
62 #define write_counter(V, MC) writel(V, MC) argument
63 #define read_counter(MC) readl(MC) argument
/Linux-v4.19/drivers/memory/samsung/
DKconfig5 Support for the Memory Controller (MC) devices found on
/Linux-v4.19/drivers/memory/tegra/
DKconfig6 This driver supports the Memory Controller (MC) hardware found on
/Linux-v4.19/Documentation/devicetree/bindings/iommu/
Dnvidia,tegra30-smmu.txt7 - interrupts : Should contain MC General interrupt.
Dmediatek,iommu.txt27 OVL0 RDMA0 WDMA0 MC PP VLD
37 in each larb. Take a example, There are many ports like MC, PP, VLD in the
/Linux-v4.19/arch/s390/numa/
Dmode_emu.c49 enum toptree_level {CORE, MC, BOOK, DRAWER, NODE, TOPOLOGY}; enumerator
282 move_level_to_numa(numa, phys, MC, true); in toptree_to_numa_first()
283 move_level_to_numa(numa, phys, MC, false); in toptree_to_numa_first()
/Linux-v4.19/drivers/staging/fsl-dpaa2/
DKconfig18 Freescale MC bus driver
/Linux-v4.19/Documentation/
Ddcdbas.txt14 300, 1300, 1400, 400SC, 500SC, 1500SC, 1550, 600SC, 1600SC, 650, 1655MC,
96 1655MC HC_SMITYPE_TYPE2
/Linux-v4.19/arch/parisc/kernel/
Dtopology.c112 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
/Linux-v4.19/Documentation/ABI/testing/
Dsysfs-bus-pci-devices-aer_stats59 MC Blocked TLP 0
90 MC Blocked TLP 0
/Linux-v4.19/drivers/iio/pressure/
Dbmp280-core.c42 enum { AC1, AC2, AC3, AC4, AC5, AC6, B1, B2, MB, MC, MD }; enumerator
54 s16 MC; member
792 calib->MC = be16_to_cpu(buf[MC]); in bmp180_read_calib()
810 x2 = (calib->MC << 11) / (x1 + calib->MD); in bmp180_compensate_temp()
/Linux-v4.19/Documentation/ia64/
Derr_inject.txt2 IPF Machine Check (MC) error inject tool
5 IPF Machine Check (MC) error inject tool is used to inject MC
6 errors from Linux. The tool is a test bed for IPF MC work flow including
7 hardware correctable error handling, OS recoverable error handling, MC
17 The tool can be used to test Intel IPF machine MC handling capabilities.
18 It's especially useful for people who can not access hardware MC injection
/Linux-v4.19/drivers/staging/media/davinci_vpfe/
DTODO7 - Use of MC and V4L2 subdev APIs when applicable
/Linux-v4.19/arch/arm/kernel/
Dtopology.c295 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
/Linux-v4.19/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a.dtsi179 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
180 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
186 * Region type 0x0 - MC portals
/Linux-v4.19/Documentation/devicetree/bindings/clock/
Dnuvoton,npcm750-clk.txt58 /* external reference clock for MC. float in normal operation */

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