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Searched refs:FIELD_PREP (Results 1 – 25 of 94) sorted by relevance

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/Linux-v4.19/drivers/iio/adc/
Dstm32-dfsdm.h48 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v)
50 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v)
52 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v)
54 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v)
56 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v)
58 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v)
60 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v)
62 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v)
64 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v)
66 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v)
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/Linux-v4.19/drivers/crypto/ccree/
Dcc_hw_queue_defs.h208 pdesc->word[3] |= FIELD_PREP(WORD3_QUEUE_LAST_IND, 1); in set_queue_last_ind_bit()
226 pdesc->word[5] |= FIELD_PREP(WORD5_DIN_ADDR_HIGH, ((u16)(addr >> 32))); in set_din_type()
228 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_DMA_MODE, dma_mode) | in set_din_type()
229 FIELD_PREP(WORD1_DIN_SIZE, size) | in set_din_type()
230 FIELD_PREP(WORD1_NS_BIT, axi_sec); in set_din_type()
244 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size); in set_din_no_dma()
260 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size) | in set_din_sram()
261 FIELD_PREP(WORD1_DIN_DMA_MODE, DMA_SRAM); in set_din_sram()
274 pdesc->word[1] |= FIELD_PREP(WORD1_DIN_CONST_VALUE, 1) | in set_din_const()
275 FIELD_PREP(WORD1_DIN_DMA_MODE, DMA_SRAM) | in set_din_const()
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Dcc_lli_defs.h49 lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 32)); in cc_lli_set_addr()
56 lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_SIZE_MASK, size); in cc_lli_set_size()
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/
Dmt76x2u_phy.c169 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2u_phy_set_channel()
170 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2u_phy_set_channel()
171 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
172 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
173 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)), in mt76x2u_phy_set_channel()
174 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2u_phy_set_channel()
175 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2u_phy_set_channel()
176 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
177 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
178 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)), in mt76x2u_phy_set_channel()
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Dmt76x2_init_common.c108 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
109 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
110 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
114 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
115 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
116 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
120 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
121 FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \ in mt76_write_mac_initvals()
122 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
123 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
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Dmt76x2_phy.c176 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[0])); in mt76x2_phy_set_gain_val()
178 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[1])); in mt76x2_phy_set_gain_val()
276 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2_phy_set_channel()
277 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2_phy_set_channel()
278 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
279 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2_phy_set_channel()
280 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)), in mt76x2_phy_set_channel()
281 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2_phy_set_channel()
282 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2_phy_set_channel()
283 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
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Dmt76x2_dma.c30 FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) | in mt76x2_tx_queue_mcu()
31 FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) | in mt76x2_tx_queue_mcu()
32 FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) | in mt76x2_tx_queue_mcu()
33 FIELD_PREP(MT_MCU_MSG_LEN, skb->len); in mt76x2_tx_queue_mcu()
Dusb_mcu.c111 info = FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) | in mt76u_mcu_send_msg()
112 FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) | in mt76u_mcu_send_msg()
152 info = cpu_to_le32(FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) | in __mt76u_mcu_fw_send_data()
153 FIELD_PREP(MT_MCU_MSG_LEN, len) | in __mt76u_mcu_fw_send_data()
/Linux-v4.19/drivers/mmc/host/
Dcavium.c188 *reg |= FIELD_PREP(GENMASK(61, 60), bus_id); in set_bus_id()
291 emm_sample = FIELD_PREP(MIO_EMM_SAMPLE_CMD_CNT, slot->cmd_cnt) | in cvm_mmc_switch_to()
292 FIELD_PREP(MIO_EMM_SAMPLE_DAT_CNT, slot->dat_cnt); in cvm_mmc_switch_to()
428 emm_dma |= FIELD_PREP(MIO_EMM_DMA_VAL, 1) | in cleanup_dma()
429 FIELD_PREP(MIO_EMM_DMA_DAT_NULL, 1); in cleanup_dma()
527 dma_cfg = FIELD_PREP(MIO_EMM_DMA_CFG_EN, 1) | in prepare_dma_single()
528 FIELD_PREP(MIO_EMM_DMA_CFG_RW, rw); in prepare_dma_single()
530 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ENDIAN, 1); in prepare_dma_single()
532 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_SIZE, in prepare_dma_single()
537 dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ADR, addr); in prepare_dma_single()
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Dmeson-mx-sdio.c178 send |= FIELD_PREP(MESON_MX_SDIO_SEND_CMD_RESP_BITS_MASK, 45); in meson_mx_mmc_start_cmd()
182 send |= FIELD_PREP(MESON_MX_SDIO_SEND_CMD_RESP_BITS_MASK, 133); in meson_mx_mmc_start_cmd()
196 send |= FIELD_PREP(MESON_MX_SDIO_SEND_REPEAT_PACKAGE_TIMES_MASK, in meson_mx_mmc_start_cmd()
205 ext |= FIELD_PREP(MESON_MX_SDIO_EXT_DATA_RW_NUMBER_MASK, in meson_mx_mmc_start_cmd()
216 send |= FIELD_PREP(MESON_MX_SDIO_SEND_COMMAND_INDEX_MASK, in meson_mx_mmc_start_cmd()
223 mult |= FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK, host->slot_id); in meson_mx_mmc_start_cmd()
381 mult |= FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, 0); in meson_mx_mmc_read_response()
707 conf |= FIELD_PREP(MESON_MX_SDIO_CONF_CMD_ARGUMENT_BITS_MASK, 39); in meson_mx_mmc_probe()
708 conf |= FIELD_PREP(MESON_MX_SDIO_CONF_M_ENDIAN_MASK, 0x3); in meson_mx_mmc_probe()
709 conf |= FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_NWR_MASK, 0x2); in meson_mx_mmc_probe()
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Ddw_mmc-bluefield.c35 reg |= FIELD_PREP(UHS_REG_EXT_SAMPLE_MASK, in dw_mci_bluefield_set_ios()
38 reg |= FIELD_PREP(UHS_REG_EXT_DRIVE_MASK, BLUEFIELD_UHS_REG_EXT_DRIVE); in dw_mci_bluefield_set_ios()
/Linux-v4.19/drivers/net/ethernet/netronome/nfp/
Dnfp_asm.c78 *instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi); in br_set_offset()
79 *instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo); in br_set_offset()
121 *instr &= ~FIELD_PREP(OP_IMMED_A_SRC, 0xff); in immed_set_value()
122 *instr |= FIELD_PREP(OP_IMMED_A_SRC, immed & 0xff); in immed_set_value()
124 *instr &= ~FIELD_PREP(OP_IMMED_B_SRC, 0xff); in immed_set_value()
125 *instr |= FIELD_PREP(OP_IMMED_B_SRC, immed & 0xff); in immed_set_value()
129 *instr |= FIELD_PREP(OP_IMMED_IMM, immed >> 8); in immed_set_value()
166 return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) | in nfp_swreg_to_unreg()
177 FIELD_PREP(UR_REG_LM_IDX, lm_id) | in nfp_swreg_to_unreg()
178 FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec); in nfp_swreg_to_unreg()
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Dnfp_net_sriov.c146 vlan_tci = FIELD_PREP(NFP_NET_VF_CFG_VLAN_VID, vlan) | in nfp_app_set_vf_vlan()
147 FIELD_PREP(NFP_NET_VF_CFG_VLAN_QOS, qos); in nfp_app_set_vf_vlan()
172 vf_ctrl |= FIELD_PREP(NFP_NET_VF_CFG_CTRL_SPOOF, enable); in nfp_app_set_vf_spoofchk()
206 vf_ctrl |= FIELD_PREP(NFP_NET_VF_CFG_CTRL_LINK_STATE, link_state); in nfp_app_set_vf_link_state()
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/mt76x0/
Dphy.c50 FIELD_PREP(MT_RF_CSR_CFG_DATA, value) | in mt76x0_rf_csr_wr()
51 FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) | in mt76x0_rf_csr_wr()
52 FIELD_PREP(MT_RF_CSR_CFG_REG_ID, reg) | in mt76x0_rf_csr_wr()
88 FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) | in mt76x0_rf_csr_rr()
89 FIELD_PREP(MT_RF_CSR_CFG_REG_ID, reg) | in mt76x0_rf_csr_rr()
569 val |= FIELD_PREP(MT_BBP_AGC_GAIN, gain); in mt76x0_phy_set_chan_bbp_params()
678 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in __mt76x0_phy_set_channel()
679 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in __mt76x0_phy_set_channel()
680 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in __mt76x0_phy_set_channel()
681 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in __mt76x0_phy_set_channel()
[all …]
Ddma.h81 FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) | in mt76x0_dma_skb_wrap()
82 FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) | in mt76x0_dma_skb_wrap()
83 FIELD_PREP(MT_TXD_INFO_TYPE, type); in mt76x0_dma_skb_wrap()
92 flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel); in mt76x0_dma_skb_wrap_pkt()
Dtx.c131 txwi_flags |= FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY, in mt76x0_push_txwi()
134 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size); in mt76x0_push_txwi()
236 val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | in mt76x0_conf_tx()
237 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) | in mt76x0_conf_tx()
238 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max); in mt76x0_conf_tx()
246 val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop); in mt76x0_conf_tx()
/Linux-v4.19/drivers/net/wireless/mediatek/mt7601u/
Ddma.h80 FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) | in mt7601u_dma_skb_wrap()
81 FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) | in mt7601u_dma_skb_wrap()
82 FIELD_PREP(MT_TXD_INFO_TYPE, type); in mt7601u_dma_skb_wrap()
91 flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel); in mt7601u_dma_skb_wrap_pkt()
Dtx.c178 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size); in mt7601u_push_txwi()
182 FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY, in mt7601u_push_txwi()
192 pkt_len |= FIELD_PREP(MT_TXWI_LEN_PKTID, pkt_id); in mt7601u_push_txwi()
289 val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | in mt7601u_conf_tx()
290 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) | in mt7601u_conf_tx()
291 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max); in mt7601u_conf_tx()
299 val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop); in mt7601u_conf_tx()
Dmac.c32 FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff)); in mt7601u_set_macaddr()
144 rateval = FIELD_PREP(MT_RXWI_RATE_MCS, rate_idx); in mt76_mac_tx_rate_val()
145 rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy); in mt76_mac_tx_rate_val()
146 rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw); in mt76_mac_tx_rate_val()
289 val |= FIELD_PREP(MT_BEACON_TIME_CFG_INTVAL, interval << 4) | in mt7601u_mac_config_tsf()
368 attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) | in mt7601u_mac_wcid_setup()
369 FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8)); in mt7601u_mac_wcid_setup()
401 FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor)); in mt7601u_mac_set_ampdu_factor()
569 val |= FIELD_PREP(MT_WCID_ATTR_PKEY_MODE, cipher & 7) | in mt76_mac_wcid_set_key()
570 FIELD_PREP(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3); in mt76_mac_wcid_set_key()
/Linux-v4.19/drivers/iommu/
Darm-smmu-v3.c297 #define ARM_SMMU_TCR2CD(tcr, fld) FIELD_PREP(CTXDESC_CD_0_TCR_##fld, \
783 cmd[0] |= FIELD_PREP(CMDQ_0_OP, ent->opcode); in arm_smmu_cmdq_build_cmd()
790 cmd[0] |= FIELD_PREP(CMDQ_PREFETCH_0_SID, ent->prefetch.sid); in arm_smmu_cmdq_build_cmd()
791 cmd[1] |= FIELD_PREP(CMDQ_PREFETCH_1_SIZE, ent->prefetch.size); in arm_smmu_cmdq_build_cmd()
795 cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid); in arm_smmu_cmdq_build_cmd()
796 cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_LEAF, ent->cfgi.leaf); in arm_smmu_cmdq_build_cmd()
800 cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_RANGE, 31); in arm_smmu_cmdq_build_cmd()
803 cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid); in arm_smmu_cmdq_build_cmd()
804 cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_LEAF, ent->tlbi.leaf); in arm_smmu_cmdq_build_cmd()
808 cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid); in arm_smmu_cmdq_build_cmd()
[all …]
/Linux-v4.19/drivers/clk/meson/
Dgxbb-aoclk-32k.c155 reg = FIELD_PREP(CLK_CNTL0_N1_MASK, freq->n1 - 1); in aoclk_cec_32k_set_rate()
158 FIELD_PREP(CLK_CNTL0_N2_MASK, freq->n2 - 1); in aoclk_cec_32k_set_rate()
162 reg = FIELD_PREP(CLK_CNTL1_M1_MASK, freq->m1 - 1); in aoclk_cec_32k_set_rate()
164 reg |= FIELD_PREP(CLK_CNTL1_M2_MASK, freq->m2 - 1); in aoclk_cec_32k_set_rate()
184 FIELD_PREP(PWR_CNTL_ALT_32K_SEL, 4)); in aoclk_cec_32k_set_rate()
/Linux-v4.19/drivers/net/ethernet/netronome/nfp/bpf/
Djit.c115 insn = FIELD_PREP(OP_CMD_A_SRC, areg) | in __emit_cmd()
116 FIELD_PREP(OP_CMD_CTX, ctx) | in __emit_cmd()
117 FIELD_PREP(OP_CMD_B_SRC, breg) | in __emit_cmd()
118 FIELD_PREP(OP_CMD_TOKEN, cmd_tgt_act[op].token) | in __emit_cmd()
119 FIELD_PREP(OP_CMD_XFER, xfer) | in __emit_cmd()
120 FIELD_PREP(OP_CMD_CNT, size) | in __emit_cmd()
121 FIELD_PREP(OP_CMD_SIG, ctx != CMD_CTX_NO_SWAP) | in __emit_cmd()
122 FIELD_PREP(OP_CMD_TGT_CMD, cmd_tgt_act[op].tgt_cmd) | in __emit_cmd()
123 FIELD_PREP(OP_CMD_INDIR, indir) | in __emit_cmd()
124 FIELD_PREP(OP_CMD_MODE, mode); in __emit_cmd()
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/Linux-v4.19/drivers/net/ethernet/netronome/nfp/flower/
Dcmsg.h481 return FIELD_PREP(NFP_FLOWER_CMSG_PORT_PHYS_PORT_NUM, phys_port) | in nfp_flower_cmsg_phys_port()
482 FIELD_PREP(NFP_FLOWER_CMSG_PORT_TYPE, in nfp_flower_cmsg_phys_port()
490 return FIELD_PREP(NFP_FLOWER_CMSG_PORT_PCI, nfp_pcie) | in nfp_flower_cmsg_pcie_port()
491 FIELD_PREP(NFP_FLOWER_CMSG_PORT_VNIC_TYPE, type) | in nfp_flower_cmsg_pcie_port()
492 FIELD_PREP(NFP_FLOWER_CMSG_PORT_VNIC, vnic) | in nfp_flower_cmsg_pcie_port()
493 FIELD_PREP(NFP_FLOWER_CMSG_PORT_PCIE_Q, q) | in nfp_flower_cmsg_pcie_port()
494 FIELD_PREP(NFP_FLOWER_CMSG_PORT_TYPE, in nfp_flower_cmsg_pcie_port()
/Linux-v4.19/drivers/net/phy/
Dmeson-gxl.c92 FIELD_PREP(TSTCNTL_REG_BANK_SEL, bank) | in meson_gxl_read_reg()
94 FIELD_PREP(TSTCNTL_READ_ADDRESS, reg)); in meson_gxl_read_reg()
120 FIELD_PREP(TSTCNTL_REG_BANK_SEL, bank) | in meson_gxl_write_reg()
122 FIELD_PREP(TSTCNTL_WRITE_ADDRESS, reg)); in meson_gxl_write_reg()
/Linux-v4.19/drivers/crypto/axis/
Dartpec6_crypto.c493 ind = FIELD_PREP(PDMA_IN_DESCRQ_PUSH_LEN, dma->in_cnt - 1) | in artpec6_crypto_start_dma()
494 FIELD_PREP(PDMA_IN_DESCRQ_PUSH_ADDR, dma->in_dma_addr >> 6); in artpec6_crypto_start_dma()
496 statd = FIELD_PREP(PDMA_IN_STATQ_PUSH_LEN, dma->in_cnt - 1) | in artpec6_crypto_start_dma()
497 FIELD_PREP(PDMA_IN_STATQ_PUSH_ADDR, dma->stat_dma_addr >> 6); in artpec6_crypto_start_dma()
499 outd = FIELD_PREP(PDMA_OUT_DESCRQ_PUSH_LEN, dma->out_cnt - 1) | in artpec6_crypto_start_dma()
500 FIELD_PREP(PDMA_OUT_DESCRQ_PUSH_ADDR, dma->out_dma_addr >> 6); in artpec6_crypto_start_dma()
1335 req_ctx->key_md = FIELD_PREP(A6_CRY_MD_OPER, in artpec6_crypto_prepare_hash()
1338 req_ctx->key_md = FIELD_PREP(A7_CRY_MD_OPER, in artpec6_crypto_prepare_hash()
1371 req_ctx->hash_md |= FIELD_PREP(A6_CRY_MD_HASH_SEL_CTX, sel_ctx); in artpec6_crypto_prepare_hash()
1378 req_ctx->hash_md |= FIELD_PREP(A7_CRY_MD_HASH_SEL_CTX, sel_ctx); in artpec6_crypto_prepare_hash()
[all …]

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