1 /*
2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #ifndef __MT76X0U_DMA_H
16 #define __MT76X0U_DMA_H
17
18 #include <asm/unaligned.h>
19 #include <linux/skbuff.h>
20
21 #define MT_DMA_HDR_LEN 4
22 #define MT_RX_INFO_LEN 4
23 #define MT_FCE_INFO_LEN 4
24 #define MT_DMA_HDRS (MT_DMA_HDR_LEN + MT_RX_INFO_LEN)
25
26 /* Common Tx DMA descriptor fields */
27 #define MT_TXD_INFO_LEN GENMASK(15, 0)
28 #define MT_TXD_INFO_D_PORT GENMASK(29, 27)
29 #define MT_TXD_INFO_TYPE GENMASK(31, 30)
30
31 /* Tx DMA MCU command specific flags */
32 #define MT_TXD_CMD_SEQ GENMASK(19, 16)
33 #define MT_TXD_CMD_TYPE GENMASK(26, 20)
34
35 enum mt76_msg_port {
36 WLAN_PORT,
37 CPU_RX_PORT,
38 CPU_TX_PORT,
39 HOST_PORT,
40 VIRTUAL_CPU_RX_PORT,
41 VIRTUAL_CPU_TX_PORT,
42 DISCARD,
43 };
44
45 enum mt76_info_type {
46 DMA_PACKET,
47 DMA_COMMAND,
48 };
49
50 /* Tx DMA packet specific flags */
51 #define MT_TXD_PKT_INFO_NEXT_VLD BIT(16)
52 #define MT_TXD_PKT_INFO_TX_BURST BIT(17)
53 #define MT_TXD_PKT_INFO_80211 BIT(19)
54 #define MT_TXD_PKT_INFO_TSO BIT(20)
55 #define MT_TXD_PKT_INFO_CSO BIT(21)
56 #define MT_TXD_PKT_INFO_WIV BIT(24)
57 #define MT_TXD_PKT_INFO_QSEL GENMASK(26, 25)
58
59 enum mt76_qsel {
60 MT_QSEL_MGMT,
61 MT_QSEL_HCCA,
62 MT_QSEL_EDCA,
63 MT_QSEL_EDCA_2,
64 };
65
66
mt76x0_dma_skb_wrap(struct sk_buff * skb,enum mt76_msg_port d_port,enum mt76_info_type type,u32 flags)67 static inline int mt76x0_dma_skb_wrap(struct sk_buff *skb,
68 enum mt76_msg_port d_port,
69 enum mt76_info_type type, u32 flags)
70 {
71 u32 info;
72
73 /* Buffer layout:
74 * | 4B | xfer len | pad | 4B |
75 * | TXINFO | pkt/cmd | zero pad to 4B | zero |
76 *
77 * length field of TXINFO should be set to 'xfer len'.
78 */
79
80 info = flags |
81 FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) |
82 FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) |
83 FIELD_PREP(MT_TXD_INFO_TYPE, type);
84
85 put_unaligned_le32(info, skb_push(skb, sizeof(info)));
86 return skb_put_padto(skb, round_up(skb->len, 4) + 4);
87 }
88
89 static inline int
mt76x0_dma_skb_wrap_pkt(struct sk_buff * skb,enum mt76_qsel qsel,u32 flags)90 mt76x0_dma_skb_wrap_pkt(struct sk_buff *skb, enum mt76_qsel qsel, u32 flags)
91 {
92 flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel);
93 return mt76x0_dma_skb_wrap(skb, WLAN_PORT, DMA_PACKET, flags);
94 }
95
96 /* Common Rx DMA descriptor fields */
97 #define MT_RXD_INFO_LEN GENMASK(13, 0)
98 #define MT_RXD_INFO_PCIE_INTR BIT(24)
99 #define MT_RXD_INFO_QSEL GENMASK(26, 25)
100 #define MT_RXD_INFO_PORT GENMASK(29, 27)
101 #define MT_RXD_INFO_TYPE GENMASK(31, 30)
102
103 /* Rx DMA packet specific flags */
104 #define MT_RXD_PKT_INFO_UDP_ERR BIT(16)
105 #define MT_RXD_PKT_INFO_TCP_ERR BIT(17)
106 #define MT_RXD_PKT_INFO_IP_ERR BIT(18)
107 #define MT_RXD_PKT_INFO_PKT_80211 BIT(19)
108 #define MT_RXD_PKT_INFO_L3L4_DONE BIT(20)
109 #define MT_RXD_PKT_INFO_MAC_LEN GENMASK(23, 21)
110
111 /* Rx DMA MCU command specific flags */
112 #define MT_RXD_CMD_INFO_SELF_GEN BIT(15)
113 #define MT_RXD_CMD_INFO_CMD_SEQ GENMASK(19, 16)
114 #define MT_RXD_CMD_INFO_EVT_TYPE GENMASK(23, 20)
115
116 enum mt76_evt_type {
117 CMD_DONE,
118 CMD_ERROR,
119 CMD_RETRY,
120 EVENT_PWR_RSP,
121 EVENT_WOW_RSP,
122 EVENT_CARRIER_DETECT_RSP,
123 EVENT_DFS_DETECT_RSP,
124 };
125
126 #endif
127
