Home
last modified time | relevance | path

Searched +full:tx +full:- +full:output +full:- +full:config (Results 1 – 25 of 453) sorted by relevance

12345678910>>...19

/Linux-v6.1/drivers/net/ethernet/marvell/octeon_ep/
Doctep_config.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 /* Tx instruction types by length */
15 /* Tx Queue: maximum descriptors per ring */
17 /* Minimum input (Tx) requests to be enqueued to ring doorbell */
19 /* Packet threshold for Tx queue interrupt */
39 /* Tx Queue wake threshold
40 * wakeup a stopped Tx queue if minimum 2 descriptors are available.
41 * Even a skb with fragments consume only one Tx queue descriptor entry.
48 #define OCTEP_MAX_MTU (10000 - (ETH_HLEN + ETH_FCS_LEN))
52 /* Macros to get octeon config params */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/can/
Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
[all …]
/Linux-v6.1/net/mac80211/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config MAC80211
21 config MAC80211_HAS_RC
24 config MAC80211_RC_MINSTREL
29 This option enables the 'minstrel' TX rate control algorithm
41 config MAC80211_RC_DEFAULT_MINSTREL
50 config MAC80211_RC_DEFAULT
60 config MAC80211_MESH
66 over (possibly multi-hop) wireless links to form a single logical
69 config MAC80211_LEDS
[all …]
/Linux-v6.1/sound/soc/meson/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 config SND_MESON_AIU
12 Select Y or M to add support for the Audio output subsystem found
15 config SND_MESON_AXG_FIFO
21 config SND_MESON_AXG_FRDDR
28 config SND_MESON_AXG_TODDR
35 config SND_MESON_AXG_TDM_FORMATTER
40 config SND_MESON_AXG_TDM_INTERFACE
44 config SND_MESON_AXG_TDMIN
52 config SND_MESON_AXG_TDMOUT
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
/Linux-v6.1/drivers/media/i2c/adv748x/
Dadv748x-csi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X CSI-2 Transmitter
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-ioctl.h>
17 int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc) in adv748x_csi2_set_virtual_channel() argument
19 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT); in adv748x_csi2_set_virtual_channel()
25 * @tx: CSI2 private entity
28 * @src_pad: Pad number of source to link to this @tx
34 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, in adv748x_csi2_register_link() argument
[all …]
/Linux-v6.1/drivers/gpu/drm/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config DRM_ROCKCHIP
24 config ROCKCHIP_VOP
31 config ROCKCHIP_VOP2
37 config ROCKCHIP_ANALOGIX_DP
47 config ROCKCHIP_CDN_DP
58 config ROCKCHIP_DW_HDMI
66 config ROCKCHIP_DW_MIPI_DSI
75 config ROCKCHIP_INNO_HDMI
82 config ROCKCHIP_LVDS
[all …]
/Linux-v6.1/drivers/net/ethernet/smsc/
Dsmc91x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*------------------------------------------------------------------------
3 . smc91x.h - macros for SMSC's 91C9x/91C1xx single-chip Ethernet device.
21 ---------------------------------------------------------------------------*/
29 * Any 16-bit access is performed with two 8-bit accesses if the hardware
30 * can't do it directly. Most registers are 16-bit so those are mandatory.
55 #include <asm/mach-types.h>
65 #define SMC_IO_SHIFT (lp->io_shift)
96 #define SMC_IRQ_FLAGS (-1) /* from resource */
114 (lp)->cfg.pxa_u16_align4)
[all …]
/Linux-v6.1/drivers/platform/mellanox/
Dmlxbf-tmfifo.c1 // SPDX-License-Identifier: GPL-2.0+
24 #include "mlxbf-tmfifo-regs.h"
29 /* Console Tx buffer size. */
32 /* Console Tx buffer reserved space. */
35 /* House-keeping timer interval. */
53 * mlxbf_tmfifo_vring - Structure of the TmFifo virtual ring
95 /* Ring types (Rx & Tx). */
103 * mlxbf_tmfifo_vdev - Structure of the TmFifo virtual device
109 * @config.cons: virtual console config -
111 * @config.net: virtual network config -
[all …]
/Linux-v6.1/drivers/net/ethernet/qlogic/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 config NET_VENDOR_QLOGIC
20 config QLA3XXX
29 config QLCNIC
37 config QLCNIC_SRIOV
38 bool "QLOGIC QLCNIC 83XX family SR-IOV Support"
42 This configuration parameter enables Single Root Input Output
47 config QLCNIC_DCB
56 to Tx.
58 config QLCNIC_HWMON
[all …]
/Linux-v6.1/drivers/net/wireless/intel/ipw2x00/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 config IPW2100
34 rather than built-in (Y). This driver requires firmware at device
35 initialization time, and when built-in this typically happens
41 config IPW2100_MONITOR
50 config IPW2100_DEBUG
51 bool "Enable full debugging output in IPW2100 module."
54 This option will enable debug tracing output for the IPW2100.
57 control which debug output is sent to the kernel log by setting the
67 config IPW2200
[all …]
/Linux-v6.1/sound/soc/atmel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config SND_ATMEL_SOC
3 tristate "SoC Audio for the Atmel System-on-Chip"
12 config SND_ATMEL_SOC_PDC
15 config SND_ATMEL_SOC_DMA
19 config SND_ATMEL_SOC_SSC
24 config SND_ATMEL_SOC_SSC_PDC
31 in PDC mode configured using audio-graph-card in device-tree.
33 config SND_ATMEL_SOC_SSC_DMA
40 in DMA mode configured using audio-graph-card in device-tree.
[all …]
/Linux-v6.1/drivers/media/rc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
19 config BPF_LIRC_MODE2
32 config LIRC
47 config IR_IMON_DECODER
54 config IR_JVC_DECODER
62 config IR_MCE_KBD_DECODER
71 config IR_NEC_DECODER
79 config IR_RC5_DECODER
80 tristate "Enable IR raw decoder for the RC-5 protocol"
84 Enable this option if you have IR with RC-5 protocol, and
[all …]
Dene_ir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #define ENE_STATUS 0 /* hardware status - unused */
25 #define ENE_FW1_TXIRQ 0x02 /* TX interrupt pending */
39 #define ENE_FW2_EMMITER1_CONN 0x10 /* TX emmiter 1 connected */
40 #define ENE_FW2_EMMITER2_CONN 0x20 /* TX emmiter 2 connected */
43 #define ENE_FW2_LEARNING 0x80 /* hardware supports learning and TX */
56 #define ENE_GPIOFS1_GPIO0D 0x20 /* enable tx output on GPIO0D */
58 #define ENE_GPIOFS8_GPIO41 0x02 /* enable tx output on GPIO40 */
78 /* CIR Config register #1 */
85 #define ENE_CIRCFG_TX_EN 0x10 /* TX enable */
[all …]
/Linux-v6.1/drivers/clk/st/
Dclk-flexgen.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-flexgen.c
5 * Copyright (C) ST-Microelectronics SA 2013
6 * Author: Maxime Coquelin <maxime.coquelin@st.com> for ST-Microelectronics.
10 #include <linux/clk-provider.h>
36 /* Pre-divisor's gate */
38 /* Pre-divisor */
56 struct clk_hw *pgate_hw = &flexgen->pgate.hw; in flexgen_enable()
57 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_enable()
66 pr_debug("%s: flexgen output enabled\n", clk_hw_get_name(hw)); in flexgen_enable()
[all …]
/Linux-v6.1/Documentation/networking/device_drivers/ethernet/aquantia/
Datlantic.rst1 .. SPDX-License-Identifier: GPL-2.0
8 For the aQuantia Multi-Gigabit PCI Express Family of Ethernet Adapters
12 - Identifying Your Adapter
13 - Configuration
14 - Supported ethtool options
15 - Command Line Parameters
16 - Config file parameters
17 - Support
18 - License
23 The driver in this release is compatible with AQC-100, AQC-107, AQC-108
[all …]
/Linux-v6.1/sound/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config SND_SOC_TEGRA
3 tristate "SoC Audio for the Tegra System-on-Chip"
14 config SND_SOC_TEGRA20_AC97
23 config SND_SOC_TEGRA20_DAS
30 config SND_SOC_TEGRA20_I2S
38 config SND_SOC_TEGRA20_SPDIF
45 config SND_SOC_TEGRA30_AHUB
52 config SND_SOC_TEGRA30_I2S
60 config SND_SOC_TEGRA210_AHUB
[all …]
/Linux-v6.1/drivers/net/ethernet/intel/igb/
De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
254 /* Constants used to intrepret the masked PCI-X bus speed. */
271 /* 1000/H is not supported, nor spec-compliant. */
305 #define E1000_TCTL_EN 0x00000002 /* enable tx */
[all …]
/Linux-v6.1/drivers/tty/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
2 config TTY
13 config VT
23 one can be used for a text-mode user session, and a third could run
25 is done with certain key combinations, usually Alt-<function key>.
42 shiny Linux system :-)
44 config CONSOLE_TRANSLATIONS
52 config VT_CONSOLE
62 the kernel messages be output only to a serial port (in which case
74 config VT_CONSOLE_SLEEP
[all …]
/Linux-v6.1/arch/arm64/boot/dts/amd/
Damd-seattle-xgbe-b.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "fixed-clock";
10 #clock-cells = <0>;
11 clock-frequency = <250000000>;
12 clock-output-names = "xgmacclk0_dma_250mhz";
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <250000000>;
19 clock-output-names = "xgmacclk0_ptp_250mhz";
23 compatible = "fixed-clock";
[all …]
/Linux-v6.1/drivers/net/wireless/intel/iwlwifi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config IWLWIFI
3 tristate "Intel Wireless WiFi Next Gen AGN - Wireless-N/Advanced-N/Ultimate-N (iwlwifi) "
10 Intel Wireless WiFi Link Next-Gen AGN
14 Intel 6000 Series Wi-Fi Adapters (6200AGN and 6300AGN)
18 Intel 6005 Series Wi-Fi Adapters
19 Intel 6030 Series Wi-Fi Adapters
21 Intel 100 Series Wi-Fi Adapters (100BGN and 130BGN)
22 Intel 2000 Series Wi-Fi Adapters
23 Intel 7260 Wi-Fi Adapter
[all …]
/Linux-v6.1/drivers/net/ethernet/sun/
Dsunbmac.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define GLOB_MSIZE 0x0cUL /* Local-mem size (64K) */
43 #define CREG_TXDS 0x0cUL /* TX descriptor ring ptr */
45 #define CREG_TIMASK 0x14UL /* TX Interrupt Mask */
50 #define CREG_TXWBUFPTR 0x28UL /* Local memory tx write ptr */
51 #define CREG_TXRBUFPTR 0x2cUL /* Local memory tx read ptr */
59 #define CREG_STAT_TXDERROR 0x00080000 /* TX Descriptor is bogus */
76 #define CREG_QMASK_TXLERR 0x00040000 /* TX late error */
77 #define CREG_QMASK_TXPERR 0x00020000 /* TX parity error */
78 #define CREG_QMASK_TXSERR 0x00010000 /* TX sbus error ack */
[all …]
/Linux-v6.1/samples/pktgen/
Dparameters.sh2 # SPDX-License-Identifier: GPL-2.0
8 echo "Usage: $0 [-vx] -i ethX"
9 echo " -i : (\$DEV) output interface/device (required)"
10 echo " -s : (\$PKT_SIZE) packet size"
11 echo " -d : (\$DEST_IP) destination IP. CIDR (e.g. 198.18.0.0/15) is also allowed"
12 echo " -m : (\$DST_MAC) destination MAC-addr"
13 echo " -p : (\$DST_PORT) destination PORT range (e.g. 433-444) is also allowed"
14 echo " -k : (\$UDP_CSUM) enable UDP tx checksum"
15 echo " -t : (\$THREADS) threads to start"
16 echo " -f : (\$F_THREAD) index of first thread (zero indexed CPU number)"
[all …]
/Linux-v6.1/drivers/staging/r8188eu/include/
DHal8188EPhyCfg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
29 u32 rfintfo; /* output data: */
31 u32 rfintfe; /* output enable: */
37 u32 rfTxGainStage; /* Tx gain stage: */
45 u32 rfSwitchControl; /* Tx Rx antenna control : */
60 u32 rfTxIQImbalance; /* OFDM Tx IQ imbalance matrix */
63 u32 rfTxAFE; /* Tx IQ DC Offset and Tx DFIR type */
68 u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for
80 /* MAC/BB/RF HAL config */
[all …]
/Linux-v6.1/include/linux/bcma/
Dbcma_driver_pci.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define BCMA_CORE_PCI_CTL_RST_OE 0x00000001 /* PCI_RESET Output Enable */
13 #define BCMA_CORE_PCI_CTL_CLK_OE 0x00000004 /* Clock gate Output Enable */
57 #define BCMA_CORE_PCI_CONFIG_ADDR 0x0120 /* pcie config space access */
58 #define BCMA_CORE_PCI_CONFIG_DATA 0x0124 /* pcie config space access */
81 #define BCMA_CORE_PCI_MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */
86 #define BCMA_CORE_PCI_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
87 #define BCMA_CORE_PCI_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
88 #define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
89 #define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
[all …]

12345678910>>...19