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/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - enum:
20 - qcom,msm8998-tcsr
21 - qcom,qcs404-tcsr
22 - qcom,sc7180-tcsr
23 - qcom,sc7280-tcsr
[all …]
/Linux-v6.1/drivers/hwspinlock/
Dqcom_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/syscon.h>
30 struct regmap_field *field = lock->priv; in qcom_hwspinlock_trylock()
47 struct regmap_field *field = lock->priv; in qcom_hwspinlock_unlock()
106 { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex },
107 { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex },
108 { .compatible = "qcom,apq8084-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
109 { .compatible = "qcom,ipq6018-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
110 { .compatible = "qcom,msm8226-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
111 { .compatible = "qcom,msm8974-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
[all …]
/Linux-v6.1/drivers/soc/qcom/
Dqcom_gsbi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/mfd/syscon.h>
15 #include <dt-bindings/soc/qcom,gsbi.h>
83 { /* ADM 0 - B */
88 { /* ADM 0 - B */
93 { /* ADM 1 - A */
98 { /* ADM 1 - B */
114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
[all …]
Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
24 #include <linux/mfd/syscon.h>
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
237 struct regmap *tcsr; member
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
7 #include <dt-bindings/mfd/qcom-rpm.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 interrupt-parent = <&intc>;
[all …]
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/hwlock/
Dqcom-hwspinlock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwlock/qcom-hwspinlock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - enum:
20 - qcom,sfpb-mutex
21 - qcom,tcsr-mutex
22 - items:
23 - enum:
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 representing a serial sub-node device that is mux'd as part of the GSBI
26 const: qcom,gsbi-v1.0.0
28 '#address-cells':
31 cell-index:
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,qcs404-cdsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,qcs404-cdsp-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
Dqcom,adsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,msm8226-adsp-pil
20 - qcom,msm8974-adsp-pil
21 - qcom,msm8996-adsp-pil
22 - qcom,msm8996-slpi-pil
23 - qcom,msm8998-adsp-pas
24 - qcom,msm8998-slpi-pas
[all …]
Dqcom,sdm845-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sdm845-adsp-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
Dqcom,sc7280-wpss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sc7280-wpss-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,sdx55-pcie-ep
16 - qcom,sm8450-pcie-ep
20 - description: Qualcomm-specific PARF configuration registers
21 - description: DesignWare PCIe registers
22 - description: External local bus interface registers
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8953-qusb2-phy
23 - qcom,msm8996-qusb2-phy
[all …]
/Linux-v6.1/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/mfd/syscon.h>
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
106 * if yes, then offset gives index in the reg-layout
124 /* set of registers with offsets different per-PHY */
277 /* offset to PHY_CLK_SCHEME register in TCSR map */
295 /* true if PHY default clk scheme is single-ended */
374 "vdd", "vdda-pll", "vdda-phy-dpdm",
379 /* struct override_param - structure holding qusb2 v2 phy overriding param
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niklas Cassel <nks@flawful.org>
23 - enum:
24 - qcom,qcs404-cpr
25 - const: qcom,cpr
36 - description: Reference clock.
38 clock-names:
40 - const: ref
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/power/qcom-rpmpd.h>
8 #include <dt-bindings/thermal/thermal.h>
11 interrupt-parent = <&intc>;
13 #address-cells = <2>;
14 #size-cells = <2>;
19 sleep_clk: sleep-clk {
[all …]
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/bus/
Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Srba <Michael.Srba@seznam.cz>
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
32 - description: SSCAON_CONFIG0 registers
33 - description: SSCAON_CONFIG1 registers
35 reg-names:
[all …]
/Linux-v6.1/drivers/clk/ingenic/
Dtcu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
11 #include <linux/mfd/syscon.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
68 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
69 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
71 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
79 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
[all …]

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