| /Linux-v5.10/Documentation/spi/ |
| D | spi-summary.rst | 2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
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| D | pxa2xx.rst | 2 PXA2xx SPI on SSP driver HOWTO
6 synchronous serial port into a SPI master controller
7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx SSP
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
17 (pump_transfer) is responsible for queuing SPI transactions and setting up and
21 -----------------------------------
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| /Linux-v5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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| D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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| D | nvidia,tegra114-spi.txt | 1 NVIDIA Tegra114 SPI controller.
4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10 - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14 - spi
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| D | spi-slave-mt27xx.txt | 1 Binding for MTK SPI Slave controller
4 - compatible: should be one of the following.
5 - mediatek,mt2712-spi-slave: for mt2712 platforms
6 - reg: Address and length of the register set for the device.
7 - interrupts: Should contain spi interrupt.
8 - clocks: phandles to input clocks.
10 - clock-names: should be "spi" for the clock gate.
13 - assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>.
14 - assigned-clock-parents: parent of mux clock.
16 - <&topckgen CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
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| D | spi-davinci.txt | 1 Davinci SPI controller device bindings
4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
10 address on the SPI bus. Should be set to 1.
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
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| D | qcom,spi-geni-qcom.txt | 1 GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
3 The QUP v3 core is a GENI based AHB slave that provides a common data path
4 (an output FIFO and an input FIFO) for serial peripheral interface (SPI)
5 mini-core.
7 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
11 - compatible: Must contain "qcom,geni-spi".
12 - reg: Must contain SPI register location and length.
13 - interrupts: Must contain SPI controller interrupts.
14 - clock-names: Must contain "se".
15 - clocks: Serial engine core clock needed by the device.
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| /Linux-v5.10/drivers/spi/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
17 chips, analog to digital (and d-to-a) converters, and more.
18 MMC and SD cards can be accessed using SPI protocol; and for
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| D | spi-slave-time.c | 2 * SPI slave handler reporting uptime at reception of previous SPI message
4 * This SPI slave handler sends the time of reception of the last SPI message
5 * as two 32-bit unsigned integers in binary format and in network byte order,
9 * Copyright (C) 2016-2017 Glider bvba
15 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
18 * # spidev_test -D /dev/spidev2.0 -p dummy-8B
19 * spi mode: 0x0
30 #include <linux/spi/spi.h>
34 struct spi_device *spi; member
48 ret = priv->msg.status; in spi_slave_time_complete()
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| D | spi-slave-system-control.c | 2 * SPI slave handler controlling system state
4 * This SPI slave handler allows remote control of system reboot, power off,
7 * Copyright (C) 2016-2017 Glider bvba
13 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
20 * # spidev_test -D /dev/spidev2.0 -p $suspend # or $reboot, $poweroff, $halt
27 #include <linux/spi/spi.h>
30 * The numbers are chosen to display something human-readable on two 7-segment
39 struct spi_device *spi; member
55 if (priv->msg.status) in spi_slave_system_control_complete()
58 cmd = be16_to_cpu(priv->cmd); in spi_slave_system_control_complete()
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| D | spi-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cadence SPI controller driver (master mode only)
5 * Copyright (C) 2008 - 2014 Xilinx, Inc.
7 * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
20 #include <linux/spi/spi.h>
23 #define CDNS_SPI_NAME "cdns-spi"
35 #define CDNS_SPI_SICR 0x24 /* Slave Idle Count Register, RW */
40 * SPI Configuration Register bit Masks
43 * of the SPI controller
48 #define CDNS_SPI_CR_SSCTRL 0x00003C00 /* Slave Select Mask */
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| D | spi-bitbang-txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * simple SPI master driver. Two do polled word-at-a-time I/O:
6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
7 * expanding the per-word routines from the inline templates below.
9 * - Drivers for controllers resembling bare shift registers. Provide
15 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
36 * A non-inlined routine would call bitbang_txrx_*() routines. The
47 bitbang_txrx_be_cpha0(struct spi_device *spi, in bitbang_txrx_be_cpha0() argument
53 u32 oldbit = (!(word & (1<<(bits-1)))) << 31; in bitbang_txrx_be_cpha0()
55 for (word <<= (32 - bits); likely(bits); bits--) { in bitbang_txrx_be_cpha0()
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for kernel SPI drivers.
6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
8 # small core, mostly translating board-specific
10 obj-$(CONFIG_SPI_MASTER) += spi.o
11 obj-$(CONFIG_SPI_MEM) += spi-mem.o
12 obj-$(CONFIG_SPI_MUX) += spi-mux.o
13 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
14 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o
16 # SPI master controller drivers (bus)
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| D | spi-xilinx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx SPI controller driver (master mode only)
10 * 2002-2007 (c) MontaVista Software, Inc.
18 #include <linux/spi/spi.h>
19 #include <linux/spi/spi_bitbang.h>
20 #include <linux/spi/xilinx_spi.h>
27 /* Register definitions as per "OPB Serial Peripheral Interface (SPI) (v1.00e)
56 #define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */
68 #define XSPI_INTR_SLAVE_MODE_FAULT 0x02 /* Selected as slave while
120 if (!xspi->tx_ptr) { in xilinx_spi_tx()
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| /Linux-v5.10/drivers/base/regmap/ |
| D | regmap-spi-avmm.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Register map access API - SPI AVMM support
5 // Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
9 #include <linux/spi/spi.h>
12 * This driver implements the regmap operations for a generic SPI
13 * master to access the registers of the spi slave chip which has an
16 * The "SPI slave to Avalon Master Bridge" (spi-avmm) IP should be integrated
17 * in the spi slave chip. The IP acts as a bridge to convert encoded streams of
19 * order to issue register access requests to the slave chip, the host should
27 * Chapter "SPI Slave/JTAG to Avalon Master Bridge Cores" is a general
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| /Linux-v5.10/Documentation/devicetree/bindings/fpga/ |
| D | xilinx-slave-serial.txt | 1 Xilinx Slave Serial SPI FPGA Manager
3 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
4 bitstream over what is referred to as "slave serial" interface.
5 The slave serial link is not technically SPI, and might require extra
6 circuits in order to play nicely with other SPI slaves on the same bus.
9 - https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
10 - https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
11 - https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
14 - compatible: should contain "xlnx,fpga-slave-serial"
15 - reg: spi chip select of the FPGA
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| D | lattice-machxo2-spi.txt | 1 Lattice MachXO2 Slave SPI FPGA Manager
4 'slave SPI' interface.
9 - compatible: should contain "lattice,machxo2-slave-spi"
10 - reg: spi chip select of the FPGA
14 fpga-region0 {
15 compatible = "fpga-region";
16 fpga-mgr = <&fpga_mgr_spi>;
17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
21 spi1: spi@2000 {
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| /Linux-v5.10/Documentation/devicetree/bindings/input/touchscreen/ |
| D | ad7879.txt | 1 * Analog Devices AD7879(-1)/AD7889(-1) touchscreen interface (SPI/I2C)
4 - compatible : for SPI slave, use "adi,ad7879"
5 for I2C slave, use "adi,ad7879-1"
6 - reg : SPI chipselect/I2C slave address
7 See spi-bus.txt for more SPI slave properties
8 - interrupts : touch controller interrupt
9 - touchscreen-max-pressure : maximum reported pressure
10 - adi,resistance-plate-x : total resistance of X-plate (for pressure
13 - touchscreen-swapped-x-y : X and Y axis are swapped (boolean)
14 - adi,first-conversion-delay : 0-12: In 128us steps (starting with 128us)
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| /Linux-v5.10/drivers/fpga/ |
| D | xilinx-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx Spartan6 and 7 Series Slave Serial SPI Driver
9 * Manage Xilinx FPGA firmware that is loaded over SPI using
10 * the slave serial configuration interface.
15 #include <linux/fpga/fpga-mgr.h>
20 #include <linux/spi/spi.h>
24 struct spi_device *spi; member
32 struct xilinx_spi_conf *conf = mgr->priv; in get_done_gpio()
35 ret = gpiod_get_value(conf->done); in get_done_gpio()
38 dev_err(&mgr->dev, "Error reading DONE (%d)\n", ret); in get_done_gpio()
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| D | machxo2-spi.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Lattice MachXO2 Slave SPI Driver
5 * Manage Lattice FPGA firmware that is loaded over SPI using
6 * the slave serial configuration interface.
12 #include <linux/fpga/fpga-mgr.h>
16 #include <linux/spi/spi.h>
18 /* MachXO2 Programming Guide - sysCONFIG Programming Commands */
29 * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
30 * Sheet' sysCONFIG Port Timing Specifications (3-36)
66 static int get_status(struct spi_device *spi, unsigned long *status) in get_status() argument
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| /Linux-v5.10/include/linux/amba/ |
| D | pl022.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
30 * enum ssp_interface - interfaces allowed for this SSP Controller
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
81 * enum ssp_data_size - number of bits in one data element
97 * enum ssp_mode - SSP mode of operation (Communication modes)
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| /Linux-v5.10/include/linux/spi/ |
| D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later
25 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
26 * and SPI infrastructure.
31 * struct spi_statistics - statistics for spi transfers
34 * @messages: number of spi-messages handled
85 spin_lock_irqsave(&(stats)->lock, flags); \
86 (stats)->field += count; \
87 spin_unlock_irqrestore(&(stats)->lock, flags); \
94 * struct spi_delay - SPI delay information
110 * struct spi_device - Controller side proxy for an SPI slave device
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| /Linux-v5.10/Documentation/devicetree/bindings/net/nfc/ |
| D | st95hf.txt | 3 ST NFC Transceiver is required to attach with SPI bus.
4 ST95HF node should be defined in DT as SPI slave device of SPI
11 - reg: Address of SPI slave "ST95HF transceiver" on SPI master bus.
13 - compatible: should be "st,st95hf" for ST95HF NFC transceiver
15 - spi-max-frequency: Max. operating SPI frequency for ST95HF
18 - enable-gpio: GPIO line to enable ST95HF transceiver.
20 - interrupts : Standard way to define ST95HF transceiver's out
25 - st95hfvin-supply : This is an optional property. It contains a
30 spi@9840000 {
32 #address-cells = <1>;
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| /Linux-v5.10/drivers/nfc/nfcmrvl/ |
| D | spi.c | 2 * Marvell NFC-over-SPI driver: SPI interface related functions
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
28 #include <linux/spi/spi.h>
35 struct spi_device *spi; member
50 if (test_and_clear_bit(SPI_WAIT_HANDSHAKE, &drv_data->flags)) { in nfcmrvl_spi_int_irq_thread_fn()
51 complete(&drv_data->handshake_completion); in nfcmrvl_spi_int_irq_thread_fn()
55 /* Normal case, SPI_INT deasserted by slave to trigger a master read */ in nfcmrvl_spi_int_irq_thread_fn()
57 skb = nci_spi_read(drv_data->nci_spi); in nfcmrvl_spi_int_irq_thread_fn()
59 nfc_err(&drv_data->spi->dev, "failed to read spi packet"); in nfcmrvl_spi_int_irq_thread_fn()
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