Lines Matching +full:spi +full:- +full:slave
1 /* SPDX-License-Identifier: GPL-2.0-or-later
25 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
26 * and SPI infrastructure.
31 * struct spi_statistics - statistics for spi transfers
34 * @messages: number of spi-messages handled
85 spin_lock_irqsave(&(stats)->lock, flags); \
86 (stats)->field += count; \
87 spin_unlock_irqrestore(&(stats)->lock, flags); \
94 * struct spi_delay - SPI delay information
110 * struct spi_device - Controller side proxy for an SPI slave device
112 * @controller: SPI controller used with the device.
118 * @mode: The spi mode defines how data is clocked out and in.
124 * like eight or 12 bits are common. In-memory wordsizes are
133 * @controller_data: Board-specific definitions for controller, such as
140 * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when
150 * A @spi_device is used to interchange data between an SPI slave
175 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
179 #define SPI_READY 0x80 /* slave pulls low to pause */
195 struct spi_delay word_delay; /* inter-word delay */
203 * - memory packing (12 bit samples into low bits, others zeroed)
204 * - priority
205 * - chipselect delays
206 * - ...
216 static inline struct spi_device *spi_dev_get(struct spi_device *spi) in spi_dev_get() argument
218 return (spi && get_device(&spi->dev)) ? spi : NULL; in spi_dev_get()
221 static inline void spi_dev_put(struct spi_device *spi) in spi_dev_put() argument
223 if (spi) in spi_dev_put()
224 put_device(&spi->dev); in spi_dev_put()
228 static inline void *spi_get_ctldata(struct spi_device *spi) in spi_get_ctldata() argument
230 return spi->controller_state; in spi_get_ctldata()
233 static inline void spi_set_ctldata(struct spi_device *spi, void *state) in spi_set_ctldata() argument
235 spi->controller_state = state; in spi_set_ctldata()
240 static inline void spi_set_drvdata(struct spi_device *spi, void *data) in spi_set_drvdata() argument
242 dev_set_drvdata(&spi->dev, data); in spi_set_drvdata()
245 static inline void *spi_get_drvdata(struct spi_device *spi) in spi_get_drvdata() argument
247 return dev_get_drvdata(&spi->dev); in spi_get_drvdata()
254 * struct spi_driver - Host side "protocol" driver
255 * @id_table: List of SPI devices supported by this driver
256 * @probe: Binds this driver to the spi device. Drivers can verify
260 * @remove: Unbinds this driver from the spi device
263 * @driver: SPI device drivers should initialize the name and owner
266 * This represents the kind of device driver that uses SPI messages to
267 * interact with the hardware at the other end of a SPI link. It's called
269 * directly to SPI hardware (which is what the underlying SPI controller
280 int (*probe)(struct spi_device *spi);
281 int (*remove)(struct spi_device *spi);
282 void (*shutdown)(struct spi_device *spi);
294 * spi_unregister_driver - reverse effect of spi_register_driver
301 driver_unregister(&sdrv->driver); in spi_unregister_driver()
309 * module_spi_driver() - Helper macro for registering a SPI driver
312 * Helper macro for SPI drivers which do not do anything special in module
321 * struct spi_controller - interface to SPI master or slave controller
324 * @bus_num: board-specific (and often SOC-specific) identifier for a
325 * given SPI controller.
327 * SPI slaves, and are numbered from zero to num_chipselects.
328 * each slave has a chipselect signal, but it's common that not
329 * every chipselect is connected to a slave.
330 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
335 * supported. If set, the SPI core will reject any transfer with an
341 * @slave: indicates that this is an SPI slave controller
347 * @bus_lock_spinlock: spinlock for SPI bus locking
349 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
351 * device's SPI controller; protocol code may call this. This
355 * @set_cs_timing: optional hook for SPI devices to request SPI master
359 * @cleanup: frees controller-specific state
367 * @cur_msg: the currently in-flight message
369 * in-flight message
400 * - return 0 if the transfer is finished,
401 * - return 1 if the transfer is still in progress. When
410 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
414 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
421 * CS number. Any individual value may be -ENOENT for CS lines that
422 * are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
426 * are not GPIOs (driven by the SPI controller itself).
427 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
430 * and SPI devices will have the cs_gpiod assigned rather than cs_gpio.
432 * fill in this field with the first unused native CS, to be used by SPI
440 * @dummy_rx: dummy receive buffer for full-duplex devices
441 * @dummy_tx: dummy transmit buffer for full-duplex devices
446 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
447 * moment in time when @spi_transfer->ptp_sts_word_pre and
448 * @spi_transfer->ptp_sts_word_post were transmitted.
449 * If the driver does not set this, the SPI core takes the snapshot as
450 * close to the driver hand-over as possible.
455 * Each SPI controller can communicate with one or more @spi_device
461 * The driver for an SPI controller manages access to those devices through
463 * an SPI slave device. For each such message it queues, it calls the
472 * board-specific. usually that simplifies to being SOC-specific.
473 * example: one SOC has three SPI controllers, numbered 0..2,
474 * and one board's schematics might show it using SPI-2. software
480 * might use board-specific GPIOs.
484 /* some SPI controllers pose alignment requirements on DMAable
497 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
498 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
512 #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
514 /* flag indicating this is an SPI slave controller */
515 bool slave; member
521 size_t (*max_transfer_size)(struct spi_device *spi);
522 size_t (*max_message_size)(struct spi_device *spi);
527 /* lock and mutex for SPI bus locking */
531 /* flag indicating that the SPI bus is locked for exclusive use */
534 /* Setup mode and clock, etc (spi driver may call many times).
540 int (*setup)(struct spi_device *spi);
543 * set_cs_timing() method is for SPI controllers that supports
546 * This hook allows SPI client drivers to request SPI controllers
550 int (*set_cs_timing)(struct spi_device *spi, struct spi_delay *setup,
557 * + For now there's no remove-from-queue operation, or
569 * + The message transfers use clock and SPI mode parameters
572 int (*transfer)(struct spi_device *spi,
576 void (*cleanup)(struct spi_device *spi);
586 struct spi_device *spi,
593 * Over time we expect SPI drivers to be phased over to this API.
628 void (*set_cs)(struct spi_device *spi, bool enable);
629 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
634 /* Optimized handlers for SPI memory-like operations. */
663 * Driver sets this field to indicate it is able to snapshot SPI
674 return dev_get_drvdata(&ctlr->dev); in spi_controller_get_devdata()
680 dev_set_drvdata(&ctlr->dev, data); in spi_controller_set_devdata()
685 if (!ctlr || !get_device(&ctlr->dev)) in spi_controller_get()
693 put_device(&ctlr->dev); in spi_controller_put()
698 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave; in spi_controller_is_slave()
718 /* the spi driver core manages memory for the spi_controller classdev */
720 unsigned int size, bool slave);
739 bool slave);
764 * SPI resource management while processing a SPI message
772 * struct spi_res - spi resource management structure
775 * @data: extra data allocated for the specific use-case
777 * this is based on ideas from devres, but focused on life-cycle
786 extern void *spi_res_alloc(struct spi_device *spi,
795 /*---------------------------------------------------------------------------*/
798 * I/O INTERFACE between SPI controller and protocol drivers
806 * pointer. (This is unlike most types of I/O API, because SPI hardware
815 * struct spi_transfer - a read/write buffer pair
816 * @tx_buf: data to be written (dma-safe memory), or NULL
817 * @rx_buf: data to be read (dma-safe memory), or NULL
840 * @effective_speed_hz: the effective SCK-speed that was used to
841 * transfer this transfer. Set to 0 if the spi bus driver does
847 * within @tx_buf for which the SPI device is requesting that the time
848 * snapshot for this transfer begins. Upon completing the SPI transfer,
857 * purposefully (instead of setting to spi_transfer->len - 1) to denote
858 * that a transfer-level snapshot taken from within the driver may still
860 * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
865 * The timestamp must represent the time at which the SPI slave device has
870 * @error: Error status logged by spi controller driver.
872 * SPI transfers always write the same number of bytes as they read.
885 * In-memory data values are always in native CPU byte order, translated
886 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
890 * When the word size of the SPI transfer is not a power-of-two multiple
891 * of eight bits, those in-memory words include extra bits. In-memory
892 * words are always seen by protocol drivers as right-justified, so the
895 * All SPI transfers start with the relevant chipselect active. Normally
906 * stay selected until the next transfer. On multi-device SPI busses
915 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
916 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
922 * Zero-initialize every field you don't set up explicitly, to
930 * spi_message.is_dma_mapped reports a pre-existing mapping
970 * struct spi_message - one multi-segment SPI transaction
972 * @spi: SPI device to which the transaction is queued
983 * @resources: for resource management when the spi message is processed
987 * in the sense that no other spi_message may use that SPI bus until that
995 * Zero-initialize every field you don't set up explicitly, to
1002 struct spi_device *spi; member
1011 * Some controller drivers (message-at-a-time queue processing)
1013 * others (with multi-message pipelines) could need a flag to
1031 /* list of spi_res reources when the spi message is processed */
1037 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1038 INIT_LIST_HEAD(&m->resources); in spi_message_init_no_memset()
1050 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1056 list_del(&t->transfer_list); in spi_transfer_del()
1064 if (t->delay_usecs) { in spi_transfer_delay_exec()
1065 d.value = t->delay_usecs; in spi_transfer_delay_exec()
1070 return spi_delay_exec(&t->delay, t); in spi_transfer_delay_exec()
1074 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1076 * @xfers: An array of spi transfers
1120 extern int spi_set_cs_timing(struct spi_device *spi,
1125 extern int spi_setup(struct spi_device *spi);
1126 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1127 extern int spi_async_locked(struct spi_device *spi,
1129 extern int spi_slave_abort(struct spi_device *spi);
1132 spi_max_message_size(struct spi_device *spi) in spi_max_message_size() argument
1134 struct spi_controller *ctlr = spi->controller; in spi_max_message_size()
1136 if (!ctlr->max_message_size) in spi_max_message_size()
1138 return ctlr->max_message_size(spi); in spi_max_message_size()
1142 spi_max_transfer_size(struct spi_device *spi) in spi_max_transfer_size() argument
1144 struct spi_controller *ctlr = spi->controller; in spi_max_transfer_size()
1146 size_t msg_max = spi_max_message_size(spi); in spi_max_transfer_size()
1148 if (ctlr->max_transfer_size) in spi_max_transfer_size()
1149 tr_max = ctlr->max_transfer_size(spi); in spi_max_transfer_size()
1156 * spi_is_bpw_supported - Check if bits per word is supported
1157 * @spi: SPI device
1160 * This function checks to see if the SPI controller supports @bpw.
1165 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw) in spi_is_bpw_supported() argument
1167 u32 bpw_mask = spi->master->bits_per_word_mask; in spi_is_bpw_supported()
1175 /*---------------------------------------------------------------------------*/
1177 /* SPI transfer replacement methods which make use of spi_res */
1184 * struct spi_replaced_transfers - structure describing the spi_transfer
1193 * are to get re-inserted
1195 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1220 /*---------------------------------------------------------------------------*/
1222 /* SPI transfer transformation methods */
1229 /*---------------------------------------------------------------------------*/
1231 /* All these synchronous SPI transfer routines are utilities layered
1236 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1237 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1242 * spi_sync_transfer - synchronous SPI data transfer
1243 * @spi: device with which data will be exchanged
1248 * Does a synchronous SPI data transfer of the given spi_transfer array.
1255 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, in spi_sync_transfer() argument
1262 return spi_sync(spi, &msg); in spi_sync_transfer()
1266 * spi_write - SPI synchronous write
1267 * @spi: device to which data will be written
1278 spi_write(struct spi_device *spi, const void *buf, size_t len) in spi_write() argument
1285 return spi_sync_transfer(spi, &t, 1); in spi_write()
1289 * spi_read - SPI synchronous read
1290 * @spi: device from which data will be read
1301 spi_read(struct spi_device *spi, void *buf, size_t len) in spi_read() argument
1308 return spi_sync_transfer(spi, &t, 1); in spi_read()
1312 extern int spi_write_then_read(struct spi_device *spi,
1317 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1318 * @spi: device with which data will be exchanged
1327 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) in spi_w8r8() argument
1332 status = spi_write_then_read(spi, &cmd, 1, &result, 1); in spi_w8r8()
1339 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1340 * @spi: device with which data will be exchanged
1344 * The number is returned in wire-order, which is at least sometimes
1345 * big-endian.
1352 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) in spi_w8r16() argument
1357 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16()
1364 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1365 * @spi: device with which data will be exchanged
1370 * convert the read 16 bit data word from big-endian to native endianness.
1377 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) in spi_w8r16be() argument
1383 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16be()
1390 /*---------------------------------------------------------------------------*/
1393 * INTERFACE between board init code and SPI infrastructure.
1395 * No SPI driver ever sees these SPI device table segments, but
1396 * it's how the SPI core (or adapters that get hotplugged) grows
1399 * As a rule, SPI devices can't be probed. Instead, board init code
1403 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1407 * struct spi_board_info - board-specific template for a SPI device
1410 * data stored there is driver-specific.
1416 * from the chip datasheet and board-specific signal quality issues.
1425 * When adding new SPI devices to the device tree, these structures serve
1431 * be stored in tables of board-specific device descriptors, which are
1474 * - quirks like clock rate mattering when not selected
1482 /* board init code may ignore whether SPI is configured or not */
1503 spi_add_device(struct spi_device *spi);
1508 extern void spi_unregister_device(struct spi_device *spi);
1516 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()