1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Cadence SPI controller driver (master mode only)
5  * Copyright (C) 2008 - 2014 Xilinx, Inc.
7  * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
20 #include <linux/spi/spi.h>
23 #define CDNS_SPI_NAME		"cdns-spi"
35 #define CDNS_SPI_SICR	0x24 /* Slave Idle Count Register, RW */
40  * SPI Configuration Register bit Masks
43  * of the SPI controller
48 #define CDNS_SPI_CR_SSCTRL		0x00003C00 /* Slave Select Mask */
61  * SPI Configuration Register - Baud rate and slave select
64  * setting the slave select.
70 #define CDNS_SPI_SS_SHIFT		10 /* Slave Select field shift in CR */
71 #define CDNS_SPI_SS0			0x1 /* Slave Select zero */
74  * SPI Interrupt Registers bit Masks
79 #define CDNS_SPI_IXR_TXOW	0x00000004 /* SPI TX FIFO Overwater */
80 #define CDNS_SPI_IXR_MODF	0x00000002 /* SPI Mode Fault */
81 #define CDNS_SPI_IXR_RXNEMTY 0x00000010 /* SPI RX FIFO Not Empty */
84 #define CDNS_SPI_IXR_TXFULL	0x00000008 /* SPI TX Full */
85 #define CDNS_SPI_IXR_ALL	0x0000007F /* SPI all interrupts */
88  * SPI Enable Register bit Masks
90  * This register is used to enable or disable the SPI controller
92 #define CDNS_SPI_ER_ENABLE	0x00000001 /* SPI Enable Bit Mask */
93 #define CDNS_SPI_ER_DISABLE	0x0 /* SPI Disable Bit Mask */
95 /* SPI FIFO depth in bytes */
102  * struct cdns_spi - This definition defines spi driver instance
103  * @regs:		Virtual address of the SPI controller registers
106  * @speed_hz:		Current SPI bus clock speed in Hz
127 /* Macros for the SPI controller read/write */
130 	return readl_relaxed(xspi->regs + offset);  in cdns_spi_read()
135 	writel_relaxed(val, xspi->regs + offset);  in cdns_spi_write()
139  * cdns_spi_init_hw - Initialize the hardware and configure the SPI controller
142  * On reset the SPI controller is configured to be in master mode, baud rate
145  * This function initializes the SPI controller to disable and clear all the
146  * interrupts, enable manual slave select and manual start, deselect all the
147  * chip select lines, and enable the SPI controller.
153 	if (xspi->is_decoded_cs)  in cdns_spi_init_hw()
169  * cdns_spi_chipselect - Select or deselect the chip select line
170  * @spi:	Pointer to the spi_device structure
173 static void cdns_spi_chipselect(struct spi_device *spi, bool is_high)  in cdns_spi_chipselect()  argument
175 	struct cdns_spi *xspi = spi_master_get_devdata(spi->master);  in cdns_spi_chipselect()
181 		/* Deselect the slave */  in cdns_spi_chipselect()
184 		/* Select the slave */  in cdns_spi_chipselect()
186 		if (!(xspi->is_decoded_cs))  in cdns_spi_chipselect()
187 			ctrl_reg |= ((~(CDNS_SPI_SS0 << spi->chip_select)) <<  in cdns_spi_chipselect()
191 			ctrl_reg |= (spi->chip_select << CDNS_SPI_SS_SHIFT) &  in cdns_spi_chipselect()
199  * cdns_spi_config_clock_mode - Sets clock polarity and phase
200  * @spi:	Pointer to the spi_device structure
204 static void cdns_spi_config_clock_mode(struct spi_device *spi)  in cdns_spi_config_clock_mode()  argument
206 	struct cdns_spi *xspi = spi_master_get_devdata(spi->master);  in cdns_spi_config_clock_mode()
212 	/* Set the SPI clock phase and clock polarity */  in cdns_spi_config_clock_mode()
214 	if (spi->mode & SPI_CPHA)  in cdns_spi_config_clock_mode()
216 	if (spi->mode & SPI_CPOL)  in cdns_spi_config_clock_mode()
223 		 * polarity as it will cause the SPI slave to see spurious clock  in cdns_spi_config_clock_mode()
233  * cdns_spi_config_clock_freq - Sets clock frequency
234  * @spi:	Pointer to the spi_device structure
242  * the requested frequency is higher or lower than that is supported by the SPI
246 static void cdns_spi_config_clock_freq(struct spi_device *spi,  in cdns_spi_config_clock_freq()  argument
249 	struct cdns_spi *xspi = spi_master_get_devdata(spi->master);  in cdns_spi_config_clock_freq()
253 	frequency = clk_get_rate(xspi->ref_clk);  in cdns_spi_config_clock_freq()
258 	if (xspi->speed_hz != transfer->speed_hz) {  in cdns_spi_config_clock_freq()
262 		       (frequency / (2 << baud_rate_val)) > transfer->speed_hz)  in cdns_spi_config_clock_freq()
268 		xspi->speed_hz = frequency / (2 << baud_rate_val);  in cdns_spi_config_clock_freq()
274  * cdns_spi_setup_transfer - Configure SPI controller for specified transfer
275  * @spi:	Pointer to the spi_device structure
279  * Sets the operational mode of SPI controller for the next SPI transfer and
284 static int cdns_spi_setup_transfer(struct spi_device *spi,  in cdns_spi_setup_transfer()  argument
287 	struct cdns_spi *xspi = spi_master_get_devdata(spi->master);  in cdns_spi_setup_transfer()
289 	cdns_spi_config_clock_freq(spi, transfer);  in cdns_spi_setup_transfer()
291 	dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u clock speed\n",  in cdns_spi_setup_transfer()
292 		__func__, spi->mode, spi->bits_per_word,  in cdns_spi_setup_transfer()
293 		xspi->speed_hz);  in cdns_spi_setup_transfer()
299  * cdns_spi_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
307 	       (xspi->tx_bytes > 0)) {  in cdns_spi_fill_tx_fifo()
310 		 * then spi control did't work thoroughly, add one byte delay  in cdns_spi_fill_tx_fifo()
316 		if (xspi->txbuf)  in cdns_spi_fill_tx_fifo()
317 			cdns_spi_write(xspi, CDNS_SPI_TXD, *xspi->txbuf++);  in cdns_spi_fill_tx_fifo()
321 		xspi->tx_bytes--;  in cdns_spi_fill_tx_fifo()
327  * cdns_spi_irq - Interrupt service routine of the SPI controller
335  * the SPI subsystem will identify the error as the remaining bytes to be
336  * transferred is non-zero.
351 		/* Indicate that transfer is completed, the SPI subsystem will  in cdns_spi_irq()
353 		 * transferred is non-zero  in cdns_spi_irq()
361 		trans_cnt = xspi->rx_bytes - xspi->tx_bytes;  in cdns_spi_irq()
368 			if (xspi->rxbuf)  in cdns_spi_irq()
369 				*xspi->rxbuf++ = data;  in cdns_spi_irq()
371 			xspi->rx_bytes--;  in cdns_spi_irq()
372 			trans_cnt--;  in cdns_spi_irq()
375 		if (xspi->tx_bytes) {  in cdns_spi_irq()
393 	cdns_spi_config_clock_mode(msg->spi);  in cdns_prepare_message()
398  * cdns_transfer_one - Initiates the SPI transfer
400  * @spi:	Pointer to the spi_device structure
404  * This function fills the TX FIFO, starts the SPI transfer and
410 			     struct spi_device *spi,  in cdns_transfer_one()  argument
415 	xspi->txbuf = transfer->tx_buf;  in cdns_transfer_one()
416 	xspi->rxbuf = transfer->rx_buf;  in cdns_transfer_one()
417 	xspi->tx_bytes = transfer->len;  in cdns_transfer_one()
418 	xspi->rx_bytes = transfer->len;  in cdns_transfer_one()
420 	cdns_spi_setup_transfer(spi, transfer);  in cdns_transfer_one()
425 	return transfer->len;  in cdns_transfer_one()
429  * cdns_prepare_transfer_hardware - Prepares hardware for transfer.
433  * This function enables SPI master controller.
447  * cdns_unprepare_transfer_hardware - Relaxes hardware after transfer
451  * This function disables the SPI master controller.
465  * cdns_spi_probe - Probe method for the SPI driver
479 	master = spi_alloc_master(&pdev->dev, sizeof(*xspi));  in cdns_spi_probe()
481 		return -ENOMEM;  in cdns_spi_probe()
484 	master->dev.of_node = pdev->dev.of_node;  in cdns_spi_probe()
487 	xspi->regs = devm_platform_ioremap_resource(pdev, 0);  in cdns_spi_probe()
488 	if (IS_ERR(xspi->regs)) {  in cdns_spi_probe()
489 		ret = PTR_ERR(xspi->regs);  in cdns_spi_probe()
493 	xspi->pclk = devm_clk_get(&pdev->dev, "pclk");  in cdns_spi_probe()
494 	if (IS_ERR(xspi->pclk)) {  in cdns_spi_probe()
495 		dev_err(&pdev->dev, "pclk clock not found.\n");  in cdns_spi_probe()
496 		ret = PTR_ERR(xspi->pclk);  in cdns_spi_probe()
500 	xspi->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");  in cdns_spi_probe()
501 	if (IS_ERR(xspi->ref_clk)) {  in cdns_spi_probe()
502 		dev_err(&pdev->dev, "ref_clk clock not found.\n");  in cdns_spi_probe()
503 		ret = PTR_ERR(xspi->ref_clk);  in cdns_spi_probe()
507 	ret = clk_prepare_enable(xspi->pclk);  in cdns_spi_probe()
509 		dev_err(&pdev->dev, "Unable to enable APB clock.\n");  in cdns_spi_probe()
513 	ret = clk_prepare_enable(xspi->ref_clk);  in cdns_spi_probe()
515 		dev_err(&pdev->dev, "Unable to enable device clock.\n");  in cdns_spi_probe()
519 	ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);  in cdns_spi_probe()
521 		master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;  in cdns_spi_probe()
523 		master->num_chipselect = num_cs;  in cdns_spi_probe()
525 	ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",  in cdns_spi_probe()
526 				   &xspi->is_decoded_cs);  in cdns_spi_probe()
528 		xspi->is_decoded_cs = 0;  in cdns_spi_probe()
530 	/* SPI controller initializations */  in cdns_spi_probe()
533 	pm_runtime_set_active(&pdev->dev);  in cdns_spi_probe()
534 	pm_runtime_enable(&pdev->dev);  in cdns_spi_probe()
535 	pm_runtime_use_autosuspend(&pdev->dev);  in cdns_spi_probe()
536 	pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);  in cdns_spi_probe()
540 		ret = -ENXIO;  in cdns_spi_probe()
544 	ret = devm_request_irq(&pdev->dev, irq, cdns_spi_irq,  in cdns_spi_probe()
545 			       0, pdev->name, master);  in cdns_spi_probe()
547 		ret = -ENXIO;  in cdns_spi_probe()
548 		dev_err(&pdev->dev, "request_irq failed\n");  in cdns_spi_probe()
552 	master->use_gpio_descriptors = true;  in cdns_spi_probe()
553 	master->prepare_transfer_hardware = cdns_prepare_transfer_hardware;  in cdns_spi_probe()
554 	master->prepare_message = cdns_prepare_message;  in cdns_spi_probe()
555 	master->transfer_one = cdns_transfer_one;  in cdns_spi_probe()
556 	master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;  in cdns_spi_probe()
557 	master->set_cs = cdns_spi_chipselect;  in cdns_spi_probe()
558 	master->auto_runtime_pm = true;  in cdns_spi_probe()
559 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;  in cdns_spi_probe()
562 	master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;  in cdns_spi_probe()
563 	xspi->speed_hz = master->max_speed_hz;  in cdns_spi_probe()
565 	master->bits_per_word_mask = SPI_BPW_MASK(8);  in cdns_spi_probe()
569 		dev_err(&pdev->dev, "spi_register_master failed\n");  in cdns_spi_probe()
576 	pm_runtime_set_suspended(&pdev->dev);  in cdns_spi_probe()
577 	pm_runtime_disable(&pdev->dev);  in cdns_spi_probe()
578 	clk_disable_unprepare(xspi->ref_clk);  in cdns_spi_probe()
580 	clk_disable_unprepare(xspi->pclk);  in cdns_spi_probe()
587  * cdns_spi_remove - Remove method for the SPI driver
603 	clk_disable_unprepare(xspi->ref_clk);  in cdns_spi_remove()
604 	clk_disable_unprepare(xspi->pclk);  in cdns_spi_remove()
605 	pm_runtime_set_suspended(&pdev->dev);  in cdns_spi_remove()
606 	pm_runtime_disable(&pdev->dev);  in cdns_spi_remove()
614  * cdns_spi_suspend - Suspend method for the SPI driver
617  * This function disables the SPI controller and
630  * cdns_spi_resume - Resume method for the SPI driver
647  * cdns_spi_runtime_resume - Runtime resume method for the SPI driver
660 	ret = clk_prepare_enable(xspi->pclk);  in cnds_runtime_resume()
666 	ret = clk_prepare_enable(xspi->ref_clk);  in cnds_runtime_resume()
669 		clk_disable_unprepare(xspi->pclk);  in cnds_runtime_resume()
676  * cdns_spi_runtime_suspend - Runtime suspend method for the SPI driver
688 	clk_disable_unprepare(xspi->ref_clk);  in cnds_runtime_suspend()
689 	clk_disable_unprepare(xspi->pclk);  in cnds_runtime_suspend()
701 	{ .compatible = "xlnx,zynq-spi-r1p6" },
702 	{ .compatible = "cdns,spi-r1p6" },
707 /* cdns_spi_driver - This structure defines the SPI subsystem platform driver */
721 MODULE_DESCRIPTION("Cadence SPI driver");