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/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/
Dmediatek,smi-larb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SMI (Smart Multimedia Interface) Local Arbiter
11 - Yong Wu <yong.wu@mediatek.com>
19 - enum:
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
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Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SMI (Smart Multimedia Interface) Common
11 - Yong Wu <yong.wu@mediatek.com>
16 MediaTek SMI have two generations of HW architecture, here is the list
21 There's slight differences between the two SMI, for generation 2, the
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
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/Linux-v5.15/drivers/memory/
Dmtk-smi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
16 #include <soc/mediatek/smi.h>
17 #include <dt-bindings/memory/mt2701-larb-port.h>
18 #include <dt-bindings/memory/mtk-memory-port.h>
37 * or non-security.
52 /* SMI COMMON */
88 struct mtk_smi_larb { /* larb: local arbiter */
89 struct mtk_smi smi; member
98 static int mtk_smi_clk_enable(const struct mtk_smi *smi) in mtk_smi_clk_enable() argument
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/Linux-v5.15/Documentation/devicetree/bindings/iommu/
Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
33 SMI Common(Smart Multimedia Interface Common)
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/Linux-v5.15/arch/arm/boot/dts/
Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
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Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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/Linux-v5.15/arch/arm64/boot/dts/mediatek/
Dmt8167.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8167-clk.h>
9 #include <dt-bindings/memory/mt8167-larb-port.h>
10 #include <dt-bindings/power/mt8167-power.h>
12 #include "mt8167-pinfunc.h"
21 compatible = "mediatek,mt8167-topckgen", "syscon";
23 #clock-cells = <1>;
27 compatible = "mediatek,mt8167-infracfg", "syscon";
29 #clock-cells = <1>;
33 compatible = "mediatek,mt8167-apmixedsys", "syscon";
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Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
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Dmt8173.dtsi14 #include <dt-bindings/clock/mt8173-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/memory/mt8173-larb-port.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/power/mt8173-power.h>
20 #include <dt-bindings/reset/mt8173-resets.h>
21 #include <dt-bindings/gce/mt8173-gce.h>
22 #include <dt-bindings/thermal/thermal.h>
23 #include "mt8173-pinfunc.h"
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Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset-controller/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
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/Linux-v5.15/Documentation/devicetree/bindings/media/
Dmediatek-jpeg-decoder.txt6 - compatible : must be one of the following string:
7 "mediatek,mt8173-jpgdec"
8 "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
9 "mediatek,mt2701-jpgdec"
10 - reg : physical base address of the jpeg decoder registers and length of
12 - interrupts : interrupt number to the interrupt controller.
13 - clocks: device clocks, see
14 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "jpgdec-smi" and "jpgdec".
16 - power-domains: a phandle to the power domain, see
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Dmediatek-jpeg-encoder.txt6 - compatible : "mediatek,mt2701-jpgenc"
7 followed by "mediatek,mtk-jpgenc"
8 - reg : physical base address of the JPEG encoder registers and length of
10 - interrupts : interrupt number to the interrupt controller.
11 - clocks: device clocks, see
12 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
13 - clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
14 - power-domains: a phandle to the power domain, see
16 - mediatek,larb: must contain the local arbiters in the current SoCs, see
17 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
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Dmediatek-mdp.txt6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
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/Linux-v5.15/drivers/media/platform/mtk-mdp/
Dmtk_mdp_comp.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <soc/mediatek/smi.h>
21 if (comp->larb_dev) { in mtk_mdp_comp_clock_on()
22 err = mtk_smi_larb_get(comp->larb_dev); in mtk_mdp_comp_clock_on()
25 "failed to get larb, err %d. type:%d\n", in mtk_mdp_comp_clock_on()
26 err, comp->type); in mtk_mdp_comp_clock_on()
29 for (i = 0; i < ARRAY_SIZE(comp->clk); i++) { in mtk_mdp_comp_clock_on()
30 if (IS_ERR(comp->clk[i])) in mtk_mdp_comp_clock_on()
32 err = clk_prepare_enable(comp->clk[i]); in mtk_mdp_comp_clock_on()
36 err, comp->type, i); in mtk_mdp_comp_clock_on()
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/Linux-v5.15/drivers/media/platform/mtk-vcodec/
Dmtk_vcodec_enc_pm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <soc/mediatek/smi.h>
26 pdev = mtkdev->plat_dev; in mtk_vcodec_init_enc_pm()
27 pm = &mtkdev->pm; in mtk_vcodec_init_enc_pm()
29 pm->mtkdev = mtkdev; in mtk_vcodec_init_enc_pm()
30 pm->dev = &pdev->dev; in mtk_vcodec_init_enc_pm()
31 dev = &pdev->dev; in mtk_vcodec_init_enc_pm()
32 enc_clk = &pm->venc_clk; in mtk_vcodec_init_enc_pm()
34 node = of_parse_phandle(dev->of_node, "mediatek,larb", 0); in mtk_vcodec_init_enc_pm()
36 mtk_v4l2_err("no mediatek,larb found"); in mtk_vcodec_init_enc_pm()
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Dmtk_vcodec_dec_pm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <soc/mediatek/smi.h>
25 pdev = mtkdev->plat_dev; in mtk_vcodec_init_dec_pm()
26 pm = &mtkdev->pm; in mtk_vcodec_init_dec_pm()
27 pm->mtkdev = mtkdev; in mtk_vcodec_init_dec_pm()
28 dec_clk = &pm->vdec_clk; in mtk_vcodec_init_dec_pm()
29 node = of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); in mtk_vcodec_init_dec_pm()
31 mtk_v4l2_err("of_parse_phandle mediatek,larb fail!"); in mtk_vcodec_init_dec_pm()
32 return -1; in mtk_vcodec_init_dec_pm()
38 return -1; in mtk_vcodec_init_dec_pm()
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/Linux-v5.15/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,disp.txt29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc)
32 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
33 "mediatek,<chip>-disp-wdma" - write DMA
34 "mediatek,<chip>-disp-ccorr" - color correction
35 "mediatek,<chip>-disp-color" - color processor
36 "mediatek,<chip>-disp-dither" - dither
37 "mediatek,<chip>-disp-aal" - adaptive ambient light controller
38 "mediatek,<chip>-disp-gamma" - gamma correction
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/Linux-v5.15/drivers/media/platform/mtk-jpeg/
Dmtk_jpeg_core.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-fh.h>
17 #define MTK_JPEG_NAME "mtk-jpeg"
36 * enum mtk_jpeg_ctx_state - states of the context state machine
48 * struct mtk_jpeg_variant - mtk jpeg driver variant
78 * struct mtk_jpeg_dev - JPEG IP abstraction
88 * @larb: SMI device
102 struct device *larb; member
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Dmtk_jpeg_core.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <media/v4l2-event.h>
21 #include <media/v4l2-mem2mem.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/videobuf2-core.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <soc/mediatek/smi.h>
120 return container_of(ctrl->handler, struct mtk_jpeg_ctx, ctrl_hdl); in ctrl_to_ctx()
139 strscpy(cap->driver, jpeg->variant->dev_name, sizeof(cap->driver)); in mtk_jpeg_querycap()
140 strscpy(cap->card, jpeg->variant->dev_name, sizeof(cap->card)); in mtk_jpeg_querycap()
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/Linux-v5.15/drivers/iommu/
Dmtk_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
11 #include <linux/dma-direct.h>
30 #include <soc/mediatek/smi.h>
123 ((((pdata)->flags) & (_x)) == (_x))
149 * |---A---|---B---|---C---|---D---|---E---|
150 * +--I/O--+------------Memory-------------+
156 * |---E---|---B---|---C---|---D---|
157 * +------------Memory-------------+
214 if (pm_runtime_get_if_in_use(data->dev) <= 0) in mtk_iommu_tlb_flush_all()
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Dmtk_iommu_v1.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2015-2016 MediaTek Inc.
15 #include <linux/dma-mapping.h>
30 #include <asm/dma-iommu.h>
32 #include <dt-bindings/memory/mt2701-larb-port.h>
33 #include <soc/mediatek/smi.h>
78 #define MT2701_M4U_TF_LARB(TF) (6 - (((TF) >> 13) & 0x7))
112 for (i = ARRAY_SIZE(mt2701_m4u_in_larb) - 1; i >= 0; i--) in mt2701_m4u_to_larb()
121 int larb = mt2701_m4u_to_larb(id); in mt2701_m4u_to_port() local
123 return id - mt2701_m4u_in_larb[larb]; in mt2701_m4u_to_port()
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/Linux-v5.15/drivers/gpu/drm/mediatek/
Dmtk_drm_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/soc/mediatek/mtk-cmdq.h>
9 #include <linux/soc/mediatek/mtk-mmsys.h>
10 #include <linux/soc/mediatek/mtk-mutex.h>
13 #include <soc/mediatek/smi.h>
28 * struct mtk_drm_crtc - MediaTek specific crtc structure.
88 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_drm_crtc_finish_page_flip()
91 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_drm_crtc_finish_page_flip()
92 drm_crtc_send_vblank_event(crtc, mtk_crtc->event); in mtk_drm_crtc_finish_page_flip()
94 mtk_crtc->event = NULL; in mtk_drm_crtc_finish_page_flip()
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