1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/soc/mediatek/mtk-cmdq.h>
9 #include <linux/soc/mediatek/mtk-mmsys.h>
10 #include <linux/soc/mediatek/mtk-mutex.h>
13 #include <soc/mediatek/smi.h>
28  * struct mtk_drm_crtc - MediaTek specific crtc structure.
88 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_finish_page_flip()
91 	spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
92 	drm_crtc_send_vblank_event(crtc, mtk_crtc->event);  in mtk_drm_crtc_finish_page_flip()
94 	mtk_crtc->event = NULL;  in mtk_drm_crtc_finish_page_flip()
95 	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
100 	drm_crtc_handle_vblank(&mtk_crtc->base);  in mtk_drm_finish_page_flip()
101 	if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {  in mtk_drm_finish_page_flip()
103 		mtk_crtc->pending_needs_vblank = false;  in mtk_drm_finish_page_flip()
111 	mtk_mutex_put(mtk_crtc->mutex);  in mtk_drm_crtc_destroy()
120 	if (crtc->state)  in mtk_drm_crtc_reset()
121 		__drm_atomic_helper_crtc_destroy_state(crtc->state);  in mtk_drm_crtc_reset()
123 	kfree(to_mtk_crtc_state(crtc->state));  in mtk_drm_crtc_reset()
124 	crtc->state = NULL;  in mtk_drm_crtc_reset()
128 		__drm_atomic_helper_crtc_reset(crtc, &state->base);  in mtk_drm_crtc_reset()
139 	__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);  in mtk_drm_crtc_duplicate_state()
141 	WARN_ON(state->base.crtc != crtc);  in mtk_drm_crtc_duplicate_state()
142 	state->base.crtc = crtc;  in mtk_drm_crtc_duplicate_state()
144 	return &state->base;  in mtk_drm_crtc_duplicate_state()
164 	struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);  in mtk_drm_crtc_mode_set_nofb()
166 	state->pending_width = crtc->mode.hdisplay;  in mtk_drm_crtc_mode_set_nofb()
167 	state->pending_height = crtc->mode.vdisplay;  in mtk_drm_crtc_mode_set_nofb()
168 	state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);  in mtk_drm_crtc_mode_set_nofb()
170 	state->pending_config = true;  in mtk_drm_crtc_mode_set_nofb()
178 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_clk_enable()
179 		ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
188 	while (--i >= 0)  in mtk_crtc_ddp_clk_enable()
189 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
197 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_clk_disable()
198 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_disable()
209 	unsigned int local_index = plane - mtk_crtc->planes;  in mtk_drm_ddp_comp_for_plane()
211 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_ddp_comp_for_plane()
212 		comp = mtk_crtc->ddp_comp[i];  in mtk_drm_ddp_comp_for_plane()
214 			*local_layer = local_index - count;  in mtk_drm_ddp_comp_for_plane()
220 	WARN(1, "Failed to find component for plane %d\n", plane->index);  in mtk_drm_ddp_comp_for_plane()
233 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_init()
241 	if (WARN_ON(!crtc->state))  in mtk_crtc_ddp_hw_init()
242 		return -EINVAL;  in mtk_crtc_ddp_hw_init()
244 	width = crtc->state->adjusted_mode.hdisplay;  in mtk_crtc_ddp_hw_init()
245 	height = crtc->state->adjusted_mode.vdisplay;  in mtk_crtc_ddp_hw_init()
246 	vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);  in mtk_crtc_ddp_hw_init()
248 	drm_for_each_encoder(encoder, crtc->dev) {  in mtk_crtc_ddp_hw_init()
249 		if (encoder->crtc != crtc)  in mtk_crtc_ddp_hw_init()
252 		drm_connector_list_iter_begin(crtc->dev, &conn_iter);  in mtk_crtc_ddp_hw_init()
254 			if (connector->encoder != encoder)  in mtk_crtc_ddp_hw_init()
256 			if (connector->display_info.bpc != 0 &&  in mtk_crtc_ddp_hw_init()
257 			    bpc > connector->display_info.bpc)  in mtk_crtc_ddp_hw_init()
258 				bpc = connector->display_info.bpc;  in mtk_crtc_ddp_hw_init()
263 	ret = pm_runtime_resume_and_get(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
269 	ret = mtk_mutex_prepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
281 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_init()
282 		mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
283 				      mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_init()
284 				      mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_init()
285 		mtk_mutex_add_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_init()
286 					mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
288 	mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
289 	mtk_mutex_enable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
291 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_init()
292 		struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];  in mtk_crtc_ddp_hw_init()
302 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_hw_init()
303 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_hw_init()
308 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_hw_init()
318 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
320 	pm_runtime_put(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
326 	struct drm_device *drm = mtk_crtc->base.dev;  in mtk_crtc_ddp_hw_fini()
327 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_fini()
330 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_fini()
331 		mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
333 			mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
336 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_hw_fini()
337 		mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
338 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
339 	mtk_mutex_disable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
340 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_fini()
341 		mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
342 					 mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_fini()
343 					 mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_fini()
344 		mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
345 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
347 	mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
349 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
351 	pm_runtime_put(drm->dev);  in mtk_crtc_ddp_hw_fini()
353 	if (crtc->state->event && !crtc->state->active) {  in mtk_crtc_ddp_hw_fini()
354 		spin_lock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
355 		drm_crtc_send_vblank_event(crtc, crtc->state->event);  in mtk_crtc_ddp_hw_fini()
356 		crtc->state->event = NULL;  in mtk_crtc_ddp_hw_fini()
357 		spin_unlock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
365 	struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);  in mtk_crtc_ddp_config()
366 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_ddp_config()
375 	if (state->pending_config) {  in mtk_crtc_ddp_config()
376 		mtk_ddp_comp_config(comp, state->pending_width,  in mtk_crtc_ddp_config()
377 				    state->pending_height,  in mtk_crtc_ddp_config()
378 				    state->pending_vrefresh, 0,  in mtk_crtc_ddp_config()
381 		state->pending_config = false;  in mtk_crtc_ddp_config()
384 	if (mtk_crtc->pending_planes) {  in mtk_crtc_ddp_config()
385 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
386 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
389 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
391 			if (!plane_state->pending.config)  in mtk_crtc_ddp_config()
401 			plane_state->pending.config = false;  in mtk_crtc_ddp_config()
403 		mtk_crtc->pending_planes = false;  in mtk_crtc_ddp_config()
406 	if (mtk_crtc->pending_async_planes) {  in mtk_crtc_ddp_config()
407 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
408 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
411 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
413 			if (!plane_state->pending.async_config)  in mtk_crtc_ddp_config()
423 			plane_state->pending.async_config = false;  in mtk_crtc_ddp_config()
425 		mtk_crtc->pending_async_planes = false;  in mtk_crtc_ddp_config()
435 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_update_config()
436 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_drm_crtc_update_config()
440 	mutex_lock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
441 	mtk_crtc->config_updating = true;  in mtk_drm_crtc_update_config()
443 		mtk_crtc->pending_needs_vblank = true;  in mtk_drm_crtc_update_config()
445 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_update_config()
446 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_update_config()
449 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_update_config()
450 		if (plane_state->pending.dirty) {  in mtk_drm_crtc_update_config()
451 			plane_state->pending.config = true;  in mtk_drm_crtc_update_config()
452 			plane_state->pending.dirty = false;  in mtk_drm_crtc_update_config()
454 		} else if (plane_state->pending.async_dirty) {  in mtk_drm_crtc_update_config()
455 			plane_state->pending.async_config = true;  in mtk_drm_crtc_update_config()
456 			plane_state->pending.async_dirty = false;  in mtk_drm_crtc_update_config()
461 		mtk_crtc->pending_planes = true;  in mtk_drm_crtc_update_config()
463 		mtk_crtc->pending_async_planes = true;  in mtk_drm_crtc_update_config()
465 	if (priv->data->shadow_register) {  in mtk_drm_crtc_update_config()
466 		mtk_mutex_acquire(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
468 		mtk_mutex_release(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
471 	if (mtk_crtc->cmdq_client) {  in mtk_drm_crtc_update_config()
472 		mbox_flush(mtk_crtc->cmdq_client->chan, 2000);  in mtk_drm_crtc_update_config()
473 		cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZE);  in mtk_drm_crtc_update_config()
474 		cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);  in mtk_drm_crtc_update_config()
475 		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);  in mtk_drm_crtc_update_config()
481 	mtk_crtc->config_updating = false;  in mtk_drm_crtc_update_config()
482 	mutex_unlock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
489 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_crtc_ddp_irq()
492 	if (!priv->data->shadow_register && !mtk_crtc->cmdq_client)  in mtk_crtc_ddp_irq()
494 	if (!priv->data->shadow_register)  in mtk_crtc_ddp_irq()
504 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_enable_vblank()
506 	mtk_ddp_comp_enable_vblank(comp, mtk_crtc_ddp_irq, &mtk_crtc->base);  in mtk_drm_crtc_enable_vblank()
514 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_disable_vblank()
536 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_async_update()
546 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_enable()
549 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_enable()
551 	ret = mtk_smi_larb_get(comp->larb_dev);  in mtk_drm_crtc_atomic_enable()
553 		DRM_ERROR("Failed to get larb: %d\n", ret);  in mtk_drm_crtc_atomic_enable()
559 		mtk_smi_larb_put(comp->larb_dev);  in mtk_drm_crtc_atomic_enable()
564 	mtk_crtc->enabled = true;  in mtk_drm_crtc_atomic_enable()
571 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_disable()
574 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_disable()
575 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_atomic_disable()
579 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_atomic_disable()
580 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_atomic_disable()
583 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_atomic_disable()
584 		plane_state->pending.enable = false;  in mtk_drm_crtc_atomic_disable()
585 		plane_state->pending.config = true;  in mtk_drm_crtc_atomic_disable()
587 	mtk_crtc->pending_planes = true;  in mtk_drm_crtc_atomic_disable()
595 	mtk_smi_larb_put(comp->larb_dev);  in mtk_drm_crtc_atomic_disable()
597 	mtk_crtc->enabled = false;  in mtk_drm_crtc_atomic_disable()
608 	if (mtk_crtc->event && mtk_crtc_state->base.event)  in mtk_drm_crtc_atomic_begin()
611 	if (mtk_crtc_state->base.event) {  in mtk_drm_crtc_atomic_begin()
612 		mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);  in mtk_drm_crtc_atomic_begin()
614 		mtk_crtc->event = mtk_crtc_state->base.event;  in mtk_drm_crtc_atomic_begin()
615 		mtk_crtc_state->base.event = NULL;  in mtk_drm_crtc_atomic_begin()
625 	if (crtc->state->color_mgmt_changed)  in mtk_drm_crtc_atomic_flush()
626 		for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_atomic_flush()
627 			mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
628 			mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
630 	mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);  in mtk_drm_crtc_atomic_flush()
661 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_init()
662 		if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY)  in mtk_drm_crtc_init()
663 			primary = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
664 		else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR)  in mtk_drm_crtc_init()
665 			cursor = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
668 	ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor,  in mtk_drm_crtc_init()
673 	drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs);  in mtk_drm_crtc_init()
678 	drm_crtc_cleanup(&mtk_crtc->base);  in mtk_drm_crtc_init()
690 	comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_num_comp_planes()
691 	if (!comp->funcs)  in mtk_drm_crtc_num_comp_planes()
694 	if (comp_idx == 1 && !comp->funcs->bgclr_in_on)  in mtk_drm_crtc_num_comp_planes()
706 	else if (plane_idx == (num_planes - 1))  in mtk_drm_crtc_plane_type()
718 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_init_comp_planes()
723 				&mtk_crtc->planes[mtk_crtc->layer_nr],  in mtk_drm_crtc_init_comp_planes()
725 				mtk_drm_crtc_plane_type(mtk_crtc->layer_nr,  in mtk_drm_crtc_init_comp_planes()
731 		mtk_crtc->layer_nr++;  in mtk_drm_crtc_init_comp_planes()
739 	struct mtk_drm_private *priv = drm_dev->dev_private;  in mtk_drm_crtc_create()
740 	struct device *dev = drm_dev->dev;  in mtk_drm_crtc_create()
743 	int pipe = priv->num_pipes;  in mtk_drm_crtc_create()
757 		node = priv->comp_node[comp_id];  in mtk_drm_crtc_create()
758 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
767 		if (!comp->dev) {  in mtk_drm_crtc_create()
769 			return -ENODEV;  in mtk_drm_crtc_create()
775 		return -ENOMEM;  in mtk_drm_crtc_create()
777 	mtk_crtc->mmsys_dev = priv->mmsys_dev;  in mtk_drm_crtc_create()
778 	mtk_crtc->ddp_comp_nr = path_len;  in mtk_drm_crtc_create()
779 	mtk_crtc->ddp_comp = devm_kmalloc_array(dev, mtk_crtc->ddp_comp_nr,  in mtk_drm_crtc_create()
780 						sizeof(*mtk_crtc->ddp_comp),  in mtk_drm_crtc_create()
782 	if (!mtk_crtc->ddp_comp)  in mtk_drm_crtc_create()
783 		return -ENOMEM;  in mtk_drm_crtc_create()
785 	mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);  in mtk_drm_crtc_create()
786 	if (IS_ERR(mtk_crtc->mutex)) {  in mtk_drm_crtc_create()
787 		ret = PTR_ERR(mtk_crtc->mutex);  in mtk_drm_crtc_create()
792 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
796 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
797 		mtk_crtc->ddp_comp[i] = comp;  in mtk_drm_crtc_create()
799 		if (comp->funcs) {  in mtk_drm_crtc_create()
800 			if (comp->funcs->gamma_set)  in mtk_drm_crtc_create()
803 			if (comp->funcs->ctm_set)  in mtk_drm_crtc_create()
808 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_drm_crtc_create()
811 	mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,  in mtk_drm_crtc_create()
814 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
826 		drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);  in mtk_drm_crtc_create()
827 	drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size);  in mtk_drm_crtc_create()
828 	priv->num_pipes++;  in mtk_drm_crtc_create()
829 	mutex_init(&mtk_crtc->hw_lock);  in mtk_drm_crtc_create()
832 	mtk_crtc->cmdq_client =  in mtk_drm_crtc_create()
833 			cmdq_mbox_create(mtk_crtc->mmsys_dev,  in mtk_drm_crtc_create()
834 					 drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
835 	if (IS_ERR(mtk_crtc->cmdq_client)) {  in mtk_drm_crtc_create()
837 			drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
838 		mtk_crtc->cmdq_client = NULL;  in mtk_drm_crtc_create()
841 	if (mtk_crtc->cmdq_client) {  in mtk_drm_crtc_create()
842 		ret = of_property_read_u32_index(priv->mutex_node,  in mtk_drm_crtc_create()
843 						 "mediatek,gce-events",  in mtk_drm_crtc_create()
844 						 drm_crtc_index(&mtk_crtc->base),  in mtk_drm_crtc_create()
845 						 &mtk_crtc->cmdq_event);  in mtk_drm_crtc_create()
847 			dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n",  in mtk_drm_crtc_create()
848 				drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
849 			cmdq_mbox_destroy(mtk_crtc->cmdq_client);  in mtk_drm_crtc_create()
850 			mtk_crtc->cmdq_client = NULL;  in mtk_drm_crtc_create()