| /Linux-v5.10/Documentation/devicetree/bindings/devfreq/ |
| D | rk3399_dmc.txt | 75 the ODT on the DRAM side and controller side are
79 the DRAM side driver strength in ohms. Default
83 the DRAM side ODT strength in ohms. Default value
87 the phy side CA line (incluing command line,
92 the PHY side DQ line (including DQS/DQ/DM line)
96 the PHY side ODT strength. Default value is
102 the ODT on the DRAM side and controller side are
106 the DRAM side driver strength in ohms. Default
110 the DRAM side ODT strength in ohms. Default value
114 the PHY side CA line (including command line,
[all …]
|
| /Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power8/ |
| D | translation.json | 29 …r chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
35 …r chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
41 …ion": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request",
47 …was loaded into the TLB from a location other than the local core's L2 due to a data side request",
53 …TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request",
59 …le Entry was loaded into the TLB from local core's L2 without conflict due to a data side request",
65 …ion": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request",
71 …ry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request",
77 …TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request",
83 …le Entry was loaded into the TLB from local core's L3 without conflict due to a data side request",
[all …]
|
| D | frontend.json | 293 …s L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request",
299 …s L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request",
305 …B from another chip's L4 on a different Node or Group (Distant) due to a instruction side request",
311 … from another chip's memory on the same Node or Group (Distant) due to a instruction side request",
317 …A Page Table Entry was loaded into the TLB from local core's L2 due to a instruction side request",
323 …ded into the TLB from a location other than the local core's L2 due to a instruction side request",
329 …m local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request",
335 …y was loaded into the TLB from local core's L2 without conflict due to a instruction side request",
341 …A Page Table Entry was loaded into the TLB from local core's L3 due to a instruction side request",
347 …ded into the TLB from a location other than the local core's L3 due to a instruction side request",
[all …]
|
| D | marked.json | 365 …s L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request",
371 …s L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request",
377 …B from another chip's L4 on a different Node or Group (Distant) due to a marked data side request",
383 … from another chip's memory on the same Node or Group (Distant) due to a marked data side request",
389 …A Page Table Entry was loaded into the TLB from local core's L2 due to a marked data side request",
395 …ded into the TLB from a location other than the local core's L2 due to a marked data side request",
401 …m local core's L2 hit without dispatch conflicts on Mepf state. due to a marked data side request",
407 …y was loaded into the TLB from local core's L2 without conflict due to a marked data side request",
413 …A Page Table Entry was loaded into the TLB from local core's L3 due to a marked data side request",
419 …ded into the TLB from a location other than the local core's L3 due to a marked data side request",
[all …]
|
| /Linux-v5.10/drivers/char/hw_random/ |
| D | Kconfig | 28 This driver provides kernel-side support for a generic Random
43 This driver provides kernel-side support for the Random Number
56 This driver provides kernel-side support for the Random Number
69 This driver provides kernel-side support for the Random Number
81 This driver provides kernel-side support for the Random Number
93 This driver provides kernel-side support for the Random Number
106 This driver provides kernel-side support for the RNG200
119 This driver provides kernel-side support for the Random Number
132 This driver provides kernel-side support for the Random Number
145 This driver provides kernel-side support for the Random Number
[all …]
|
| /Linux-v5.10/Documentation/locking/ |
| D | seqlock.rst | 15 read side critical section is even and the same sequence count value is
17 be copied out inside the read side critical section. If the sequence
24 the end of the write side critical section the sequence count becomes
27 A sequence counter write side critical section must never be preempted
28 or interrupted by read side sections. Otherwise the reader will spin for
43 multiple writers. Write side critical sections must thus be serialized
48 write side section. If the read section can be invoked from hardirq or
76 /* ... [[write-side critical section]] ... */
85 /* ... [[read-side critical section]] ... */
95 As discussed at :ref:`seqcount_t`, sequence count write side critical
[all …]
|
| /Linux-v5.10/tools/perf/pmu-events/arch/x86/silvermont/ |
| D | virtual-memory.json | 19 "BriefDescription": "D-side page-walks",
23 …"PublicDescription": "This event counts every cycle when a D-side (walks due to a load) page walk …
29 "BriefDescription": "Duration of D-side page-walks in core cycles"
38 "BriefDescription": "I-side page-walks",
42 …"PublicDescription": "This event counts every cycle when a I-side (walks due to an instruction fet…
48 "BriefDescription": "Duration of I-side page-walks in core cycles"
57 "BriefDescription": "Total page walks that are completed (I-side and D-side)",
67 "BriefDescription": "Total cycles for all the page walks. (I-side and D-side)"
|
| /Linux-v5.10/Documentation/usb/ |
| D | gadget_serial.rst | 57 side driver. It runs on a Linux system that has USB device side
66 | Host-Side CDC ACM USB Host |
78 | Device-Side | Gadget | Controller | |
84 On the device-side Linux system, the gadget serial driver looks
87 On the host-side system, the gadget serial device looks like a
92 The host side driver can potentially be any ACM compliant driver
98 With the gadget serial driver and the host side ACM or generic
100 the host and the gadget side systems as if they were connected by a
111 side kernel for "Support for USB Gadgets", for a "USB Peripheral
128 side Linux system. You can add this to the start up scripts, if
[all …]
|
| /Linux-v5.10/Documentation/RCU/ |
| D | checklist.rst | 18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
28 read-side primitives is critically important.
59 2. Do the RCU read-side critical sections make proper use of
63 under your read-side code, which can greatly increase the
68 rcu_read_lock_sched(), or by the appropriate update-side lock.
72 Letting RCU-protected pointers "leak" out of an RCU read-side
76 -before- letting them out of the RCU read-side critical section.
151 perfectly legal (if redundant) for update-side code to
156 of an RCU read-side critical section. See lockdep.txt
[all …]
|
| D | lockdep.rst | 8 aware of when each task enters and leaves any flavor of RCU read-side
31 Check for RCU read-side critical section.
33 Check for RCU-bh read-side critical section.
35 Check for RCU-sched read-side critical section.
37 Check for SRCU read-side critical section.
80 1. An RCU read-side critical section (implicit), or
85 RCU read-side critical sections, in case (2) the ->file_lock prevents
96 complain if this was used in an RCU read-side critical section unless one
104 traversal primitives check for being called from within an RCU read-side
108 false and they are called from outside any RCU read-side critical section.
[all …]
|
| D | whatisRCU.rst | 94 b. Wait for all previous readers to complete their RCU read-side
157 entering an RCU read-side critical section. It is illegal
158 to block while in an RCU read-side critical section, though
160 read-side critical sections. Any RCU-protected data structure
161 accessed during an RCU read-side critical section is guaranteed to
171 exiting an RCU read-side critical section. Note that RCU
172 read-side critical sections may be nested and/or overlapping.
180 read-side critical sections on all CPUs have completed.
182 any subsequent RCU read-side critical sections to complete.
195 read-side critical sections to complete, not necessarily for
[all …]
|
| /Linux-v5.10/include/linux/ |
| D | srcu.h | 67 * srcu_read_lock_held - might we be in SRCU read-side critical section?
71 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC,
72 * this assumes we are in an SRCU read-side critical section unless it can
102 * really are in an SRCU read-side critical section.
103 * @c: condition to check for update-side use
105 * If PROVE_RCU is enabled, invoking this outside of an RCU read-side
117 * really are in an SRCU read-side critical section.
120 * is enabled, invoking this outside of an RCU read-side critical
129 * really are in an SRCU read-side critical section.
137 * Enter an SRCU read-side critical section. Note that SRCU read-side
[all …]
|
| D | rcupdate.h | 115 * RCU read-side critical sections are forbidden in the inner idle loop,
117 * will happily ignore any such read-side critical sections. However,
313 "Illegal context switch in RCU read-side critical section"); in rcu_preempt_sleep_check()
323 "Illegal context switch in RCU-bh read-side critical section"); \
325 "Illegal context switch in RCU-sched read-side critical section"); \
396 * will be dereferenced by RCU read-side code.
448 * lockdep checks for being in an RCU read-side critical section. This is
452 * where update-side locks prevent the value of the pointer from changing,
455 * It is also permissible to use rcu_access_pointer() when read-side
473 * An implicit check for being in an RCU read-side critical section
[all …]
|
| D | seqlock.h | 46 * Write side critical sections must be serialized and non-preemptible.
125 * that the write side critical section is properly serialized.
128 * preemption protection is enforced in the write side function.
136 * For PREEMPT_RT, seqcount_LOCKNAME_t write side critical sections cannot
137 * disable preemption. It can lead to higher latencies, and the write side
165 * that the write side critical section is properly serialized.
519 * write_seqcount_begin() - start a seqcount_t write side critical section
522 * write_seqcount_begin opens a write side critical section of the given
525 * Context: seqcount_t write side critical sections must be serialized and
545 * write_seqcount_end() - end a seqcount_t write side critical section
[all …]
|
| /Linux-v5.10/tools/perf/pmu-events/arch/x86/knightslanding/ |
| D | virtual-memory.json | 18 …"BriefDescription": "Counts the total D-side page walks that are completed or started. The page wa…
27 …"BriefDescription": "Counts the total number of core cycles for all the D-side page walks. The cyc…
35 "BriefDescription": "Counts the total I-side page walks that are completed.",
39 …"PublicDescription": "This event counts every cycle when an I-side (walks due to an instruction fe…
45 …"BriefDescription": "Counts the total number of core cycles for all the I-side page walks. The cyc…
53 "BriefDescription": "Counts the total page walks that are completed (I-side and D-side)",
|
| /Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power9/ |
| D | translation.json | 25 …m another chip's memory on the same Node or Group (Distant) due to a data side request. When using…
35 …chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request"
60 … or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using…
75 …ared or modified data from another core's L2/L3 on the same chip due to a instruction side request"
100 …e TLB from another chip's L4 on the same Node or Group ( Remote) due to a instruction side request"
145 …from a memory location including L4 from local remote or distant due to a instruction side request"
150 …rom another core's L2/L3 on a different chip (remote or distant) due to a instruction side request"
165 … or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using…
185 …om another chip's L4 on a different Node or Group (Distant) due to a data side request. When using…
210 …chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request"
[all …]
|
| D | pipeline.json | 35 …her chip's L4 on a different Node or Group (Distant) due to a marked data side request. When using…
40 …s loaded into the TLB from local core's L2 without conflict due to a data side request. When using…
80 …ied (M) data from another core's L2 on the same chip due to a marked data side request. When using…
95 …h Modified (M) data from another core's L2 on the same chip due to a data side request. When using…
115 …e's L3 without dispatch conflicts hit on Mepf state. due to a marked data side request. When using…
160 …core's L2/L3 on a different chip (remote or distant) due to a marked data side request. When using…
175 …ed into the TLB from local core's L3 with dispatch conflict due to a data side request. When using…
180 …d into the TLB from local core's L2 without conflict due to a marked data side request. When using…
225 …d into the TLB from local core's L3 without conflict due to a marked data side request. When using…
250 …s L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. When using…
[all …]
|
| D | pmc.json | 20 …on a different Node or Group (Distant), as this chip due to a marked data side request. When using…
30 …into the TLB from a location other than the local core's L3 due to a data side request. When using…
40 …e TLB from a location other than the local core's L2 due to a marked data side request.. When usin…
90 …a memory location including L4 from local remote or distant due to a data side request. When using…
95 … the TLB from local core's L3 with dispatch conflict due to a marked data side request. When using…
100 …e Entry was loaded into the TLB from local core's L3 due to a marked data side request. When using…
110 …ntry was loaded into the TLB from the local chip's L4 cache due to a data side request. When using…
|
| D | marked.json | 20 …ith Shared (S) data from another core's L3 on the same chip due to a data side request. When using…
60 …s loaded into the TLB from the local chip's L4 cache due to a marked data side request.. When usin…
70 …(S) data from another core's ECO L3 on the same chip due to a marked data side request. When using…
95 …(M) data from another core's ECO L3 on the same chip due to a marked data side request. When using…
100 …Shared (S) data from another core's ECO L3 on the same chip due to a data side request. When using…
140 …aded into the TLB from a location other than the local core's L2 due to a instruction side request"
170 …om local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request"
210 …was loaded into the TLB from the local chip's Memory due to a marked data side request. When using…
220 …e TLB from a location other than the local core's L3 due to a marked data side request. When using…
290 … Entry was loaded into the TLB from the local chip's Memory due to a data side request. When using…
[all …]
|
| D | other.json | 50 …dified (M) data from another core's ECO L3 on the same chip due to a data side request. When using…
455 "BriefDescription": "D-side L2 MRU touch commands sent to the L2"
510 …red (S) data from another core's L2 on the same chip due to a marked data side request. When using…
660 …"BriefDescription": "All D-side-Ld or I-side-instruction-fetch dispatch attempts for this thread t…
705 …"BriefDescription": "All successful D-side-Ld/St or I-side-instruction-fetch dispatches for this t…
825 …"BriefDescription": "All successful D-side-Ld or I-side-instruction-fetch dispatches for this thre…
845 …"BriefDescription": "All D-side-Ld or I-side-instruction-fetch dispatch attempts for this thread t…
1055 …nother core's L2/L3 on a different chip (remote or distant) due to a data side request. When using…
1125 …ble Entry was loaded into the TLB from the local chip's L4 cache due to a instruction side request"
1160 …"BriefDescription": "All I-side-instruction-fetch dispatch attempts for this thread that failed du…
[all …]
|
| /Linux-v5.10/Documentation/RCU/Design/Requirements/ |
| D | Requirements.rst | 20 updaters do not block readers, which means that RCU's read-side
74 of all pre-existing RCU read-side critical sections. An RCU read-side
77 RCU treats a nested set as one big RCU read-side critical section.
131 | Second, even when using ``synchronize_rcu()``, the other update-side |
173 The RCU read-side critical section in ``do_something_dlm()`` works with
190 In order to avoid fatal problems such as deadlocks, an RCU read-side
192 Similarly, an RCU read-side critical section must not contain anything
198 be good to be able to use RCU to coordinate read-side access to linked
372 outermost RCU read-side critical section containing that
386 #. Wait for all pre-existing RCU read-side critical sections to complete
[all …]
|
| /Linux-v5.10/drivers/block/rnbd/ |
| D | README | 12 on the client side as local block devices.
26 Server side:
29 Client side:
39 mapped from the server side. After the session to the server machine is
40 established, the mapped device will appear on the client side under
51 to the block device on the server side by concatenating dev_search_path
73 information: side, max_hw_sectors, etc.
|
| /Linux-v5.10/arch/arm/mm/ |
| D | pmsa-v7.c | 52 /* Data-side / unified region attributes */
76 /* Optional instruction-side region attributes */
78 /* I-side Region access control register */
84 /* I-side Region size register */
90 /* I-side Region base address register */
108 /* Data-side / unified region attributes */
137 /* ARMv7-M only supports a unified MPU, so I-side operations are nop */
314 * We don't support a different number of I/D side regions so if we in __mpu_max_regions()
316 * whichever side has a smaller number of supported regions. in __mpu_max_regions()
324 /* Check for separate d-side and i-side memory maps */ in __mpu_max_regions()
[all …]
|
| /Linux-v5.10/drivers/media/platform/mtk-vcodec/venc/ |
| D | venc_h264_if.c | 102 * @vpua: VPU side memory addr which is used by RC_CODE
115 * This structure is allocated in VPU side and shared to AP side.
117 * @work_bufs: working buffer information in VPU side
118 * The work_bufs here is for storing the 'size' info shared to AP side.
120 * in AP side. The AP driver will copy the 'size' from here to the one in
123 * register setting in VPU side.
141 * @vsi: driver structure allocated by VPU side and shared to AP side for
253 * This 'wb' structure is set by VPU side and shared to AP for in h264_enc_alloc_work_buf()
258 * (1) RC_CODE buffer, it's pre-allocated in the VPU side, and in h264_enc_alloc_work_buf()
261 * in 'iova' field for reg setting in VPU side. in h264_enc_alloc_work_buf()
[all …]
|
| /Linux-v5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,aoss-qmp.txt | 1 Qualcomm Always-On Subsystem side channel binding
3 This binding describes the hardware component responsible for side channel
10 The AOSS side channel exposes control over a set of resources, used to control
56 The AOSS side channel also provides the controls for three cooling devices,
67 The following example represents the AOSS side-channel message RAM and the
|
