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/Linux-v5.4/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.txt4 common properties between various SOC designs. It thus enables us to use the
8 - compatible : contains "mmc-pwrseq-simple".
11 - reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
13 They will be de-asserted right after the power has been provided to the
15 - clocks : Must contain an entry for the entry in clock-names.
16 See ../clocks/clock-bindings.txt for details.
17 - clock-names : Must include the following entry:
19 - post-power-on-delay-ms : Delay in ms after powering the card and
20 de-asserting the reset-gpios (if any)
21 - power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
[all …]
Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/Linux-v5.4/drivers/mmc/host/
Dsdhci-bcm-kona.c16 #include <linux/delay.h>
25 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-pltfm.h"
63 /* This timeout should be sufficent for core to reset */ in sdhci_bcm_kona_sd_reset()
66 /* reset the host using the top level reset */ in sdhci_bcm_kona_sd_reset()
73 pr_err("Error: sd host is stuck in reset!!!\n"); in sdhci_bcm_kona_sd_reset()
74 return -EFAULT; in sdhci_bcm_kona_sd_reset()
78 /* bring the host out of reset */ in sdhci_bcm_kona_sd_reset()
83 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
84 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_reset()
[all …]
/Linux-v5.4/arch/arm/boot/dts/
Dexynos4412-galaxy-s3.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include "exynos4412-midas.dtsi"
20 flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
21 enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
23 pinctrl-names = "default", "host", "isp";
24 pinctrl-0 = <&camera_flash_host>;
25 pinctrl-1 = <&camera_flash_host>;
26 pinctrl-2 = <&camera_flash_isp>;
28 flash-led {
[all …]
Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
Drk3288-r89.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
23 #clock-cells = <0>;
26 gpio-keys {
[all …]
Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
[all …]
Dimx6q-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+)
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/imx6qdl-clock.h>
11 #include <dt-bindings/input/input.h>
26 reg_usb_otg_vbus: regulator-usb-otg-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg_vbus";
29 regulator-min-microvolt = <5000000>;
30 regulator-max-microvolt = <5000000>;
[all …]
/Linux-v5.4/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
46 * H/W requires a 5us delay between disabling the bypass and in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
[all …]
Dclk-hfpll.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/delay.h>
9 #include <linux/clk-provider.h>
12 #include "clk-regmap.h"
13 #include "clk-hfpll.h"
23 struct hfpll_data const *hd = h->d; in __clk_hfpll_init_once()
24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once()
26 if (likely(h->init_done)) in __clk_hfpll_init_once()
30 if (hd->config_val) in __clk_hfpll_init_once()
31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
/Linux-v5.4/arch/arm64/boot/dts/amlogic/
Dmeson-gxm-q200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxm.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
Dmeson-gxl-s905d-p230.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxl-s905d.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
Dmeson-gxbb-p200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb-p20x.dtsi"
11 #include <dt-bindings/input/input.h>
14 compatible = "amlogic,p200", "amlogic,meson-gxbb";
17 avdd18_usb_adc: regulator-avdd18_usb_adc {
18 compatible = "regulator-fixed";
19 regulator-name = "AVDD18_USB_ADC";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
[all …]
Dmeson-gxm-nexbox-a1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-gxm.dtsi"
15 compatible = "nexbox,a1", "amlogic,s912", "amlogic,meson-gxm";
24 stdout-path = "serial0:115200n8";
32 vddio_boot: regulator-vddio-boot {
33 compatible = "regulator-fixed";
34 regulator-name = "VDDIO_BOOT";
35 regulator-min-microvolt = <1800000>;
36 regulator-max-microvolt = <1800000>;
[all …]
/Linux-v5.4/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/power/qcom-rpmpd.h>
8 #include <dt-bindings/gpio/gpio.h>
11 interrupt-parent = <&intc>;
13 qcom,msm-id = <292 0x0>;
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
/Linux-v5.4/Documentation/admin-guide/blockdev/
Dparide.rst5 PARIDE v1.03 (c) 1997-8 Grant Guenther <grant@torque.net>
11 to personal computers, many external devices such as portable hard-disk,
12 CD-ROM, LS-120 and tape drives use the parallel port to connect to their
13 host computer. While some devices (notably scanners) use ad-hoc methods
16 a parallel-port adapter chip added in. Some of the original parallel port
18 (The Iomega PPA-3 adapter used in the ZIP drives is an example of this
26 which is then connected to a floppy-tape mechanism. The vast majority
29 were to open up a parallel port CD-ROM drive, for instance, one would
30 find a standard ATAPI CD-ROM drive, a power supply, and a single adapter
32 IDE cable. It is usually possible to exchange the CD-ROM device with
[all …]
/Linux-v5.4/drivers/w1/masters/
Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
8 #include <linux/delay.h>
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
47 /* Wait for reset sequence 511+512us, use 1500us for sure */ in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
/Linux-v5.4/drivers/reset/
Dreset-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Broadcom STB generic reset controller for SW_INIT style reset controller
8 #include <linux/delay.h>
14 #include <linux/reset-controller.h>
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert()
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert()
58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert()
59 * operation is typically 14us for the worst case, build some slack in brcmstb_reset_deassert()
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status()
85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe()
[all …]
/Linux-v5.4/arch/arm64/boot/dts/rockchip/
Drk3399-gru-scarlet.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-scarlet board device tree source
8 #include "rk3399-gru.dtsi"
14 pp1250_s3: pp1250-s3 {
15 compatible = "regulator-fixed";
16 regulator-name = "pp1250_s3";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <1250000>;
22 regulator-max-microvolt = <1250000>;
[all …]
/Linux-v5.4/sound/soc/intel/haswell/
Dsst-haswell-dsp.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
22 #include "../common/sst-dsp.h"
23 #include "../common/sst-dsp-priv.h"
24 #include "../haswell/sst-haswell-ipc.h"
87 int type = le16_to_cpu(module->type); in hsw_parse_module()
88 int entry_point = le32_to_cpu(module->entry_point); in hsw_parse_module()
100 dev_dbg(dsp->dev, "new module sign 0x%s size 0x%x blocks 0x%x type 0x%x\n", in hsw_parse_module()
101 module->signature, module->mod_size, in hsw_parse_module()
[all …]
/Linux-v5.4/drivers/gpu/drm/panel/
Dpanel-novatek-nt39016.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/delay.h>
13 #include <linux/media-bus-format.h>
127 err = regulator_enable(panel->supply); in nt39016_prepare()
129 dev_err(panel->dev, "Failed to enable power supply: %d", err); in nt39016_prepare()
134 * Reset the NT39016. in nt39016_prepare()
135 * The documentation says the reset pulse should be at least 40 us to in nt39016_prepare()
137 * some succeed when using a 70 us delay, so we use 100 us instead. in nt39016_prepare()
139 gpiod_set_value_cansleep(panel->reset_gpio, 1); in nt39016_prepare()
141 gpiod_set_value_cansleep(panel->reset_gpio, 0); in nt39016_prepare()
[all …]

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