/Linux-v5.15/Documentation/devicetree/bindings/pci/ |
D | intel-gw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rahul Tanwar <rtanwar@maxlinear.com> 16 const: intel,lgm-pcie 18 - compatible 21 - $ref: /schemas/pci/snps,dw-pcie.yaml# 26 - const: intel,lgm-pcie 27 - const: snps,dw-pcie [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/rtc/ |
D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs Real-Time Clock DT bindings 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: rtc.yaml# 18 - enum: 19 - ingenic,jz4740-rtc 20 - ingenic,jz4760-rtc 21 - items: [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/sound/ |
D | ti,tas5086.txt | 1 Texas Instruments TAS5086 6-channel PWM Processor 5 - compatible: Should contain "ti,tas5086". 6 - reg: The i2c address. Should contain <0x1b>. 10 - reset-gpio: A GPIO spec to define which pin is connected to the 11 chip's !RESET pin. If specified, the driver will 12 assert a hardware reset at probe time. 14 - ti,charge-period: This property should contain the time in microseconds 15 that closely matches the external single-ended 16 split-capacitor charge period. The hardware chip 20 When not specified, the hardware default of 1300ms [all …]
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/Linux-v5.15/drivers/scsi/ |
D | mesh.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * SCSI low-level driver for the MESH (Macintosh Enhanced SCSI Hardware) 5 * We assume the MESH is connected to a DBDMA (descriptor-based DMA) 11 * Apr. 21 2002 - BenH Rework bus reset code for new error handler 12 * Add delay after initial bus reset 15 * Sep. 27 2003 - BenH Move to new driver model, fix some write posting 18 * - handle aborts correctly 19 * - retry arbitration if lost (unless higher levels do this for us) 20 * - power down the chip when no device is detected 76 MODULE_PARM_DESC(init_reset_delay, "Initial bus reset delay (0=no reset)"); [all …]
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D | mesh.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 53 #define SEQ_ATN 0x20 /* assert ATN signal */ 69 #define SEQ_RESETMESH 0x0e /* reset the controller */ 103 #define ERR_SCSIRESET 0x20 /* SCSI bus got reset on us */ 124 * The units of the sel_timeout register are 10ms.
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D | NCR5380.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * to implement 5380 SCSI drivers under Linux with a non-trantor 13 * +1 (303) 666-5836 24 * 1+ (719) 578-3400 25 * 1+ (800) 334-5454 42 * transfer - some PC's will use the I/O bus, 68K's must use 46 * each 5380 in the system - commands that haven't been issued yet, 51 * allowing multiple commands to propagate all the way to a SCSI-II device 57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 102 * NCR5380_read(register) - read from the specified register [all …]
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/Linux-v5.15/drivers/rtc/ |
D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> 66 return readl(rtc->base + reg); in jz4740_rtc_reg_read() 76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready() 78 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready() 90 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write() 93 ctrl = readl(rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write() 94 } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); in jz4780_rtc_enable_write() 96 return timeout ? 0 : -EIO; in jz4780_rtc_enable_write() 104 if (rtc->type >= ID_JZ4760) in jz4740_rtc_reg_write() [all …]
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/Linux-v5.15/drivers/pci/controller/dwc/ |
D | pcie-fu740.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2019-2021 SiFive, Inc. 28 #include <linux/reset.h> 30 #include "pcie-designware.h" 32 #define to_fu740_pcie(x) dev_get_drvdata((x)->dev) 37 struct gpio_desc *reset; member 84 /* Assert PERST_N GPIO */ in fu740_pcie_assert_reset() 85 gpiod_set_value_cansleep(afp->reset, 0); in fu740_pcie_assert_reset() 86 /* Assert controller PERST_N */ in fu740_pcie_assert_reset() 87 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_assert_reset() [all …]
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/Linux-v5.15/drivers/gpu/drm/panel/ |
D | panel-samsung-db7430.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Found in the Samsung Galaxy Beam GT-I8350 mobile phone. 16 #include <linux/media-bus-format.h> 49 * struct db7430 - state container for a panel controlled by the DB7430 63 /** @reset: reset GPIO line */ 64 struct gpio_desc *reset; member 95 struct mipi_dbi *dbi = &db->dbi; in db7430_power_on() 99 ret = regulator_bulk_enable(ARRAY_SIZE(db->regulators), in db7430_power_on() 100 db->regulators); in db7430_power_on() 102 dev_err(db->dev, "failed to enable regulators: %d\n", ret); in db7430_power_on() [all …]
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D | panel-widechips-ws2401.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone. 7 * Inspired by code and know-how in the vendor driver by Gareth Phillips. 18 #include <linux/media-bus-format.h> 58 * struct ws2401 - state container for a panel controlled by the WS2401 72 /** @reset: reset GPIO line */ 73 struct gpio_desc *reset; member 106 struct mipi_dbi *dbi = &ws->dbi; in ws2401_read_mtp_id() 112 dev_err(ws->dev, "unable to read MTP ID 1\n"); in ws2401_read_mtp_id() 117 dev_err(ws->dev, "unable to read MTP ID 2\n"); in ws2401_read_mtp_id() [all …]
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D | panel-ilitek-ili9341.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * - 16-bit parallel RGB interface 7 * - 18-bit parallel RGB interface 8 * - 4-line serial spi interface 13 * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c 17 * For only-dbi part, copy from David's code (drm/tiny/ili9341.c) 115 /* struct ili9341_config - the system specific ILI9341 configuration */ 188 * The Stm32f429-disco board has a panel ili9341 connected to ltdc controller 218 * 0xa2 Normally white, G1 -> G320, S720 -> S1, 219 * Scan Cycle 5 frames,85ms [all …]
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/Linux-v5.15/drivers/net/wireless/intersil/orinoco/ |
D | orinoco_pci.c | 4 * (i.e. these are not PCMCIA cards in a PCMCIA-to-PCI bridge). 14 * Some of this code is "inspired" by linux-wlan-ng-0.1.10, but nothing 15 * has been copied from it. linux-wlan-ng-0.1.10 is originally : 20 * (C) Copyright David Gibson, IBM Corp. 2002-2003. 59 /* Bitmask to reset the card */ 62 /* Magic timeouts for doing the reset. 63 * Those times are straight from wlan-ng, and it is claimed that they 65 #define HERMES_PCI_COR_ONT (250) /* ms */ 66 #define HERMES_PCI_COR_OFFT (500) /* ms */ 67 #define HERMES_PCI_COR_BUSYT (500) /* ms */ [all …]
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/Linux-v5.15/drivers/macintosh/ |
D | mediabay.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 32 #define MB_FCR32(bay, r) ((bay)->base + ((r) >> 2)) 33 #define MB_FCR8(bay, r) (((volatile u8 __iomem *)((bay)->base)) + (r)) 76 * Wait that number of ms between each step in normal polling mode 81 * Consider the media-bay ID value stable if it is the same for 86 /* Wait after powering up the media bay this delay in ms 92 * Hold the media-bay reset signal true for this many ticks 98 * Wait this long after the reset signal is released and before doing 99 * further operations. After this delay, the IDE reset signal is released 105 * Wait this many ticks after an IDE device (e.g. CD-ROM) is inserted [all …]
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/Linux-v5.15/drivers/pps/clients/ |
D | pps-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * pps-gpio.c -- PPS client driver using GPIO 9 #define PPS_GPIO_NAME "pps-gpio" 33 struct timer_list echo_timer; /* timer to reset echo active state */ 55 rising_edge = gpiod_get_value(info->gpio_pin); in pps_gpio_irq_handler() 56 if ((rising_edge && !info->assert_falling_edge) || in pps_gpio_irq_handler() 57 (!rising_edge && info->assert_falling_edge)) in pps_gpio_irq_handler() 58 pps_event(info->pps, &ts, PPS_CAPTUREASSERT, data); in pps_gpio_irq_handler() 59 else if (info->capture_clear && in pps_gpio_irq_handler() 60 ((rising_edge && info->assert_falling_edge) || in pps_gpio_irq_handler() [all …]
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/Linux-v5.15/drivers/phy/ralink/ |
D | phy-ralink-usb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 20 #include <linux/reset.h> 63 writel(val, phy->base + reg); in u2_phy_w32() 68 return readl(phy->base + reg); in u2_phy_r32() 97 regmap_update_bits(phy->sysctl, RT_SYSC_REG_CLKCFG1, in ralink_usb_phy_power_on() 98 phy->clk, phy->clk); in ralink_usb_phy_power_on() 101 regmap_update_bits(phy->sysctl, RT_SYSC_REG_SYSCFG1, in ralink_usb_phy_power_on() 105 /* deassert the reset lines */ in ralink_usb_phy_power_on() 106 reset_control_deassert(phy->rsthost); in ralink_usb_phy_power_on() 107 reset_control_deassert(phy->rstdev); in ralink_usb_phy_power_on() [all …]
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/Linux-v5.15/drivers/watchdog/ |
D | pnx4008_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0 12 * 2005-2006 (c) MontaVista Software, Inc. 34 /* WatchDog Timer - Chapter 23 Page 207 */ 87 /* stop counter, initiate counter reset */ in pnx4008_wdt_start() 89 /*wait for reset to complete. 100% guarantee event */ in pnx4008_wdt_start() 92 /* internal and external reset, stop after that */ in pnx4008_wdt_start() 98 /* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */ in pnx4008_wdt_start() 100 writel(wdd->timeout * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base)); in pnx4008_wdt_start() 121 wdd->timeout = new_timeout; in pnx4008_wdt_set_timeout() 133 * - For details, see the 'reboot' syscall in kernel/reboot.c in pnx4008_restart_handler() [all …]
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/Linux-v5.15/include/linux/ |
D | rmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2011-2016 Synaptics Incorporated 21 * struct rmi_2d_axis_alignment - target axis alignment 22 * @swap_axes: set to TRUE if desired to swap x- and y-axis 23 * @flip_x: set to TRUE if desired to flip direction on x-axis 24 * @flip_y: set to TRUE if desired to flip direction on y-axis 25 * @clip_x_low - reported X coordinates below this setting will be clipped to 27 * @clip_x_high - reported X coordinates above this setting will be clipped to 29 * @clip_y_low - reported Y coordinates below this setting will be clipped to 31 * @clip_y_high - reported Y coordinates above this setting will be clipped to [all …]
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/Linux-v5.15/arch/arm64/boot/dts/rockchip/ |
D | rk3399-gru-scarlet.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-scarlet board device tree source 8 #include "rk3399-gru.dtsi" 14 pp1250_s3: pp1250-s3 { 15 compatible = "regulator-fixed"; 16 regulator-name = "pp1250_s3"; 19 regulator-always-on; 20 regulator-boot-on; 21 regulator-min-microvolt = <1250000>; 22 regulator-max-microvolt = <1250000>; [all …]
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/Linux-v5.15/drivers/net/ethernet/chelsio/cxgb/ |
D | pm3393.c | 7 * PMC/SIERRA (pm3393) MAC-PHY functionality. * 23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. * 96 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread() 102 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite() 106 /* Port reset. */ 124 /* PM3393 - Enabling all hardware block interrupts. in pm3393_interrupt_enable() 147 /* PM3393 - Global interrupt enable in pm3393_interrupt_enable() 153 /* TERMINATOR - PL_INTERUPTS_EXT */ in pm3393_interrupt_enable() 154 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable() 156 writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable() [all …]
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/Linux-v5.15/drivers/gpu/drm/bridge/ |
D | parade-ps8622.c | 1 // SPDX-License-Identifier: GPL-2.0-only 69 struct i2c_adapter *adap = client->adapter; in ps8622_set() 73 msg.addr = client->addr + page; in ps8622_set() 81 client->addr + page, reg, val, ret); in ps8622_set() 87 struct i2c_client *cl = ps8622->client; in ps8622_send_config() 138 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config() 148 /* Gitune=-37% */ in ps8622_send_config() 168 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config() 180 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config() 185 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config() [all …]
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/Linux-v5.15/drivers/scsi/csiostor/ |
D | csio_mb.c | 4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved. 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 51 * csio_mb_fw_retval - FW return value from a mailbox response. 60 hdr = (struct fw_cmd_hdr *)(mbp->mb); in csio_mb_fw_retval() 62 return FW_CMD_RETVAL_G(ntohl(hdr->lo)); in csio_mb_fw_retval() 66 * csio_mb_hello - FW HELLO command helper 80 struct fw_hello_cmd *cmdp = (struct fw_hello_cmd *)(mbp->mb); in csio_mb_hello() 84 cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_HELLO_CMD) | in csio_mb_hello() 86 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); in csio_mb_hello() [all …]
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/Linux-v5.15/drivers/net/ethernet/intel/ixgb/ |
D | ixgb_hw.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2008 Intel Corporation. */ 61 /* Workaround for 82597EX reset errata */ in ixgb_mac_reset() 67 /* Delay a few ms just to allow the reset to complete */ in ixgb_mac_reset() 71 /* Make sure the self-clearing global reset bit did self clear */ in ixgb_mac_reset() 72 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST)); in ixgb_mac_reset() 75 if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN) { in ixgb_mac_reset() 86 if (hw->phy_type == ixgb_phy_type_txn17401) in ixgb_mac_reset() 93 * Reset the transmit and receive units; mask and clear all interrupts. 95 * hw - Struct containing variables accessed by shared code [all …]
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/Linux-v5.15/arch/mips/include/asm/sn/ |
D | ioc3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 50 u8 fill0[0x151 - 0x142 - 1]; 56 u8 fill1[0x159 - 0x153 - 1]; 62 u8 fill2[0x16a - 0x15b - 1]; 67 u8 fill3[0x170 - 0x16b - 1]; 153 u32 pad1[(0x20000 - 0x00154) / 4]; 157 u32 pad2[(0x40000 - 0x20180) / 4]; 160 u32 ssram[(0x80000 - 0x40000) / 4]; 163 0x80000 - Access to the generic devices selected with DEV0 165 0xA0000 - Access to the generic devices selected with DEV1 [all …]
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/Linux-v5.15/drivers/nvmem/ |
D | lpc18xx_eeprom.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <linux/nvmem-provider.h> 17 #include <linux/reset.h> 41 /* EEPROM requires 3 ms of erase/program time between each writing */ 57 writel(val, eeprom->reg_base + reg); in lpc18xx_eeprom_writel() 63 return readl(eeprom->reg_base + reg); in lpc18xx_eeprom_readl() 87 return -ETIMEDOUT; in lpc18xx_eeprom_busywait_until_prog() 101 if ((reg > eeprom->size - LPC18XX_EEPROM_PAGE_SIZE) || in lpc18xx_eeprom_gather_write() 102 (reg + bytes > eeprom->size - LPC18XX_EEPROM_PAGE_SIZE)) in lpc18xx_eeprom_gather_write() 103 return -EINVAL; in lpc18xx_eeprom_gather_write() [all …]
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/Linux-v5.15/drivers/remoteproc/ |
D | qcom_q6v5_mss.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Qualcomm self-authenticating modem subsystem remoteproc driver 7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 13 #include <linux/dma-mapping.h> 26 #include <linux/reset.h> 235 if (rc != -EPROBE_DEFER) in q6v5_regulator_init() 259 dev_err(qproc->dev, in q6v5_regulator_enable() 270 dev_err(qproc->dev, in q6v5_regulator_enable() 278 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable() 285 for (; i >= 0; i--) { in q6v5_regulator_enable() [all …]
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