Searched +full:psci +full:- +full:0 (Results 1 – 25 of 173) sorted by relevance
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/ |
| D | psci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/psci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 Firmware implementing the PSCI functions described in ARM document number
15 processors") can be used by Linux to initiate various CPU-centric power
21 Functions are invoked by trapping to the privilege level of the PSCI
25 r0 => 32-bit Function ID / return value
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| D | idle-states.txt | 6 1 - Introduction
10 where cores can be put in different low-power states (ranging from simple
12 the range of dynamic idle states that a processor can enter at run-time, can be
19 - Running
20 - Idle_standby
21 - Idle_retention
22 - Sleep
23 - Off
29 wake-up capabilities, hence it is not considered in this document).
39 2 - idle-states definitions
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| /Linux-v5.4/arch/arm64/boot/dts/cavium/ |
| D | thunder-88xx.dtsi | 2 * Cavium Thunder DTS file - Thunder SoC description
6 * This file is dual-licensed: you can use it either under the terms
24 * MA 02110-1301 USA
51 compatible = "cavium,thunder-88xx";
52 interrupt-parent = <&gic0>;
53 #address-cells = <2>;
54 #size-cells = <2>;
56 psci {
57 compatible = "arm,psci-0.2";
62 #address-cells = <2>;
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| D | thunder2-99xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2013-2016 Broadcom
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
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| /Linux-v5.4/include/uapi/linux/ |
| D | psci.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * ARM Power State and Coordination Interface (PSCI) header
5 * This header holds common PSCI defines and macros shared
16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
20 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
26 #define PSCI_0_2_FN_BASE 0x84000000
28 #define PSCI_0_2_64BIT 0x40000000
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| /Linux-v5.4/drivers/cpuidle/ |
| D | cpuidle-psci.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
9 #define pr_fmt(fmt) "CPUidle PSCI: " fmt
18 #include <linux/psci.h>
33 idx, state[idx - 1]); in psci_enter_idle_state()
40 * PSCI idle states relies on architectural WFI to
41 * be represented as state index 0.
43 .states[0] = {
54 { .compatible = "arm,idle-state",
61 int err = of_property_read_u32(np, "arm,psci-suspend-param", state); in psci_dt_parse_state_node()
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| /Linux-v5.4/arch/arm64/boot/dts/hisilicon/ |
| D | hip05.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip05-d02";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
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| D | hip07.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
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| /Linux-v5.4/arch/arm64/boot/dts/marvell/ |
| D | armada-ap810-ap0-octa-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap810-ap0.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 compatible = "marvell,armada-ap810-octa";
16 cpu0: cpu@0 {
18 compatible = "arm,cortex-a72";
19 reg = <0x000>;
20 enable-method = "psci";
24 compatible = "arm,cortex-a72";
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| D | armada-ap806-quad.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap806.dtsi"
12 compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
15 #address-cells = <1>;
16 #size-cells = <0>;
18 cpu0: cpu@0 {
20 compatible = "arm,cortex-a72";
21 reg = <0x000>;
22 enable-method = "psci";
23 #cooling-cells = <2>;
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| /Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
| D | mt6755.dtsi | 14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
23 psci {
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu0: cpu@0 {
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| D | mt6795.dtsi | 14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
23 psci {
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu0: cpu@0 {
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| D | mt6797.dtsi | 14 #include <dt-bindings/clock/mt6797-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/pinctrl/mt6797-pinfunc.h>
21 interrupt-parent = <&sysirq>;
22 #address-cells = <2>;
23 #size-cells = <2>;
25 psci {
26 compatible = "arm,psci-0.2";
31 #address-cells = <1>;
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| /Linux-v5.4/drivers/firmware/psci/ |
| D | psci.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #define pr_fmt(fmt) "psci: " fmt
10 #include <linux/arm-smccc.h>
17 #include <linux/psci.h>
22 #include <uapi/linux/psci.h>
31 * While a 64-bit OS can make calls with SMC32 calling conventions, for some
32 * calls it is necessary to use SMC64 to pass or return 64-bit values.
34 * (native-width) function ID.
45 * a Trusted OS even if it claims to be capable of migration -- doing so will
48 static int resident_cpu = -1;
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| /Linux-v5.4/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2530.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 stdout-path = "serial0:115200n8";
19 reg = <0x0 0x80000000 0x0 0xc0000000>;
29 clock-frequency = <400000>;
33 nvidia,invert-interrupt;
39 bus-width = <8>;
40 non-removable;
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <0>;
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| /Linux-v5.4/Documentation/devicetree/bindings/ |
| D | numa.txt | 6 1 - Introduction
18 2 - numa-node-id
23 a node id is a 32-bit integer.
26 numa-node-id property which contains the node id of the device.
29 /* numa node 0 */
30 numa-node-id = <0>;
33 numa-node-id = <1>;
36 3 - distance-map
39 The optional device tree node distance-map describes the relative
42 - compatible : Should at least contain "numa-distance-map-v1".
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| /Linux-v5.4/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/power/meson-g12a-power.h>
14 #address-cells = <0x2>;
15 #size-cells = <0x0>;
17 cpu-map {
47 cpu0: cpu@0 {
49 compatible = "arm,cortex-a53";
50 reg = <0x0 0x0>;
51 enable-method = "psci";
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| /Linux-v5.4/arch/arm64/boot/dts/synaptics/ |
| D | as370.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-1.0";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu0: cpu@0 {
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| D | berlin4ct.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
20 psci {
21 compatible = "arm,psci-1.0", "arm,psci-0.2";
26 #address-cells = <1>;
27 #size-cells = <0>;
29 cpu0: cpu@0 {
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| /Linux-v5.4/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-qcom-hw.txt | 8 - compatible
11 Definition: must be "qcom,cpufreq-hw".
13 - clocks
18 - clock-names
23 - reg
25 Value type: <prop-encoded-array>
28 - reg-names
32 "freq-domain0", "freq-domain1".
34 - #freq-domain-cells:
38 * Property qcom,freq-domain
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| /Linux-v5.4/arch/arm64/boot/dts/arm/ |
| D | juno-r2.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
30 psci {
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| D | juno.dts | 4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-path = "serial0:115200n8";
29 psci {
30 compatible = "arm,psci-0.2";
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| D | juno-r1.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
30 psci {
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| D | fvp-base-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 /memreserve/ 0x80000000 0x00010000;
17 #include "rtsm_ve-motherboard.dtsi"
18 #include "rtsm_ve-motherboard-rs2.dtsi"
22 compatible = "arm,fvp-base-revc", "arm,vexpress";
23 interrupt-parent = <&gic>;
24 #address-cells = <2>;
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| /Linux-v5.4/arch/arm64/kernel/ |
| D | psci.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "psci: " fmt
15 #include <linux/psci.h>
18 #include <uapi/linux/psci.h>
26 return 0; in cpu_psci_cpu_init()
33 return -ENODEV; in cpu_psci_cpu_prepare()
36 return 0; in cpu_psci_cpu_prepare()
58 return -EOPNOTSUPP; in cpu_psci_cpu_disable()
62 return -EPERM; in cpu_psci_cpu_disable()
64 return 0; in cpu_psci_cpu_disable()
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