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/Linux-v5.10/arch/arm/mach-omap2/
Dcm_common.c1 // SPDX-License-Identifier: GPL-2.0-only
25 * cm_ll_data: function pointers to SoC-specific implementations of
41 * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
43 * @cm2: CM2 base virtual address (if present on the booted SoC)
54 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
61 * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
69 if (!cm_ll_data->split_idlest_reg) { in cm_split_idlest_reg()
70 WARN_ONCE(1, "cm: %s: no low-level function defined\n", in cm_split_idlest_reg()
72 return -EINVAL; in cm_split_idlest_reg()
75 ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst, in cm_split_idlest_reg()
[all …]
Dprm_common.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Tero Kristo <t-kristo@ti.com>
24 #include <linux/clk-provider.h>
27 #include "soc.h"
45 * actual amount of memory needed for the SoC
51 * by the PRCM interrupt handler code. There will be one 'chip' per
70 * prm_ll_data: function pointers to SoC-specific implementations of
86 for (i = 0; i < prcm_irq_setup->nr_regs; i++) { in omap_prcm_events_filter_priority()
88 events[i] & prcm_irq_setup->priority_mask[i]; in omap_prcm_events_filter_priority()
99 * done by the SoC specific individual handlers.
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/Linux-v5.10/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt4 - compatible: should be "mediatek,<name>-pwm":
5 - "mediatek,mt2712-pwm": found on mt2712 SoC.
6 - "mediatek,mt7622-pwm": found on mt7622 SoC.
7 - "mediatek,mt7623-pwm": found on mt7623 SoC.
8 - "mediatek,mt7628-pwm": found on mt7628 SoC.
9 - "mediatek,mt7629-pwm": found on mt7629 SoC.
10 - "mediatek,mt8516-pwm": found on mt8516 SoC.
11 - reg: physical base address and length of the controller's registers.
12 - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
14 - clocks: phandle and clock specifier of the PWM reference clock.
[all …]
Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 "#pwm-cells":
18 - 2
19 - 3
23 - enum:
24 - fsl,imx1-pwm
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/Linux-v5.10/tools/perf/pmu-events/arch/x86/cascadelakex/
Dclx-metrics.json7-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4…
21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For…
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY …
28-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work…
33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETI…
36-of-order scheduler dispatches ready uops into their respective execution units; and once complete…
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/Linux-v5.10/Documentation/power/
Dopp.rst5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
23 In an operational system executing varied use cases, not all modules in the SoC
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
30 the device will support per domain are called Operating Performance Points or
41 - {300000000, 1000000}
42 - {800000000, 1200000}
43 - {1000000000, 1300000}
46 ----------------------------------------
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/Linux-v5.10/Documentation/devicetree/bindings/remoteproc/
Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
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/Linux-v5.10/Documentation/devicetree/bindings/c6x/
Ddscr.txt2 ------------------------------------
5 function for SoC control or status. Details vary considerably among from SoC
6 to SoC with no two being alike.
12 enable (and disable in some cases) SoC pin drivers, select peripheral clock
24 - compatible: must be "ti,c64x+dscr"
25 - reg: register area base and size
34 - ti,dscr-devstat
37 - ti,dscr-silicon-rev
40 - ti,dscr-rmii-resets
44 - ti,dscr-locked-regs
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/Linux-v5.10/drivers/crypto/allwinner/
DKconfig19 Some Allwinner SoC have a crypto accelerator named
25 will be called sun4i-ss.
32 Select this option if you want to provide kernel-side support for
33 the Pseudo-Random Number Generator found in the Security System.
47 Allwinner SoC H2+, H3, H5, H6, R40 and A64.
51 will be called sun8i-ce.
54 bool "Enable sun8i-ce stats"
58 Say y to enable sun8i-ce debug stats.
59 This will create /sys/kernel/debug/sun8i-ce/stats for displaying
60 the number of requests per flow and per algorithm.
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/Linux-v5.10/tools/perf/pmu-events/arch/x86/skylakex/
Dskx-metrics.json7-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4…
21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For…
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY …
28-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work…
33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETI…
36-of-order scheduler dispatches ready uops into their respective execution units; and once complete…
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/i2c/
Di2c-davinci.txt7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
10 For 66AK2G this property should be set per binding,
11 Documentation/devicetree/bindings/clock/ti,sci-clk.txt
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
19 value. This property is as per the binding,
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
23 - interrupts : standard interrupt property.
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/timer/
Dnxp,tpm-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
22 const: fsl,imx7ulp-tpm
32 - description: SoC TPM ipg clock
33 - description: SoC TPM per clock
35 clock-names:
37 - const: ipg
[all …]
Dfsl,imxgpt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
15 - const: fsl,imx1-gpt
16 - const: fsl,imx21-gpt
17 - items:
18 - const: fsl,imx27-gpt
19 - const: fsl,imx21-gpt
20 - const: fsl,imx31-gpt
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/spi/
Dspi-fsl-lpspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: "/schemas/spi/spi-controller.yaml#"
18 - fsl,imx7ulp-spi
19 - fsl,imx8qxp-spi
29 - description: SoC SPI per clock
30 - description: SoC SPI ipg clock
[all …]
Dspi-davinci.txt4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
[all …]
Dfsl-imx-cspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "/schemas/spi/spi-controller.yaml#"
18 - const: fsl,imx1-cspi
19 - const: fsl,imx21-cspi
20 - const: fsl,imx27-cspi
21 - const: fsl,imx31-cspi
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/dma/
Dfsl-edma.txt3 The eDMA channels have multiplex capability by programmble memory-mapped
10 - compatible :
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
14 LS1028A SoC.
15 - reg : Specifies base physical address(s) and size of the eDMA registers.
19 - interrupts : A list of interrupt-specifiers, one for each entry in
20 interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel
21 per transmission interrupt, total 16 channel interrupt and 1
[all …]
/Linux-v5.10/Documentation/admin-guide/perf/
Dthunderx2-pmu.rst2 Cavium ThunderX2 SoC Performance Monitoring Unit (PMU UNCORE)
5 The ThunderX2 SoC PMU consists of independent, system-wide, per-socket
16 overflow interrupt. DMC and L3C counters are 32-bit and read every 2 seconds.
17 The CCPI2 counters are 64-bit and assumed not to overflow in normal operation.
21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and
28 work. Per-task perf sessions are also not supported.
32 # perf stat -a -e uncore_dmc_0/cnt_cycles/ sleep 1
34 # perf stat -a -e \
40 # perf stat -a -e \
/Linux-v5.10/drivers/pinctrl/mediatek/
Dpinctrl-moore.c1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
4 * pinctrl-bindings.txt for MediaTek SoC.
6 * Copyright (C) 2017-2018 MediaTek Inc.
12 #include "pinctrl-moore.h"
25 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
26 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
33 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
34 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
48 return -EINVAL; in mtk_pinmux_set_mux()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Dberlin,pinctrl.txt1 * Pin-controller driver for the Marvell Berlin SoCs
4 controller register sets. Pin controller nodes should be a sub-node of
9 A pin-controller node should contain subnodes representing the pin group
10 configurations, one per function. Each subnode has the group name and
14 is called a 'function' in the pin-controller subsystem.
17 - compatible: should be one of:
18 "marvell,berlin2-soc-pinctrl",
19 "marvell,berlin2-system-pinctrl",
20 "marvell,berlin2cd-soc-pinctrl",
21 "marvell,berlin2cd-system-pinctrl",
[all …]
/Linux-v5.10/drivers/pinctrl/intel/
Dpinctrl-intel.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
43 * struct intel_function - Description about a function
55 * struct intel_padgroup - Hardware pad group information
74 * enum - Special treatment for GPIO base in pad group
81 INTEL_GPIO_BASE_ZERO = -2,
82 INTEL_GPIO_BASE_NOMAP = -1,
87 * struct intel_community - Intel pin community description
108 * @pad_map: Optional non-linear mapping of the pads
148 * PIN_GROUP - Declare a pin group
[all …]
/Linux-v5.10/sound/soc/qcom/
Dlpass.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015,2020 The Linux Foundation. All rights reserved.
5 * lpass.h - Definitions for the QTi LPASS
15 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "lpass-hdmi.h"
27 return -EINVAL; \
58 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
73 /* low-power audio interface (LPAIF) registers */
77 /* regmap backed by the low-power audio interface (LPAIF) registers */
81 /* interrupts from the low-power audio interface (LPAIF) */
[all …]
/Linux-v5.10/Documentation/admin-guide/media/
Dfimc.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| 2012 - 2013 Samsung Electronics Co., Ltd.
11 SoC Application Processors is an integrated camera host interface, color
13 data from LCD controller (FIMD) through the SoC internal writeback data
17 drivers/media/platform/exynos4-is directory.
20 --------------
22 S5PC100 (mem-to-mem only), S5PV210, Exynos4210
25 ------------------
27 - camera parallel interface capture (ITU-R.BT601/565);
28 - camera serial interface capture (MIPI-CSI2);
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dpci-rcar-gen2.txt2 -------------------------
5 AHB. There is one bridge instance per USB port connected to the internal
9 - compatible: "renesas,pci-r8a7742" for the R8A7742 SoC;
10 "renesas,pci-r8a7743" for the R8A7743 SoC;
11 "renesas,pci-r8a7744" for the R8A7744 SoC;
12 "renesas,pci-r8a7745" for the R8A7745 SoC;
13 "renesas,pci-r8a7790" for the R8A7790 SoC;
14 "renesas,pci-r8a7791" for the R8A7791 SoC;
15 "renesas,pci-r8a7793" for the R8A7793 SoC;
16 "renesas,pci-r8a7794" for the R8A7794 SoC;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dmxs-lradc.txt4 - compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
5 for i.MX28 SoC
6 - reg: Address and length of the register set for the device
7 - interrupts: Should contain the LRADC interrupts
10 - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
13 disabled. 5 wires is valid for i.MX28 SoC only.
14 - fsl,ave-ctrl: number of samples per direction to calculate an average value.
16 - fsl,ave-delay: delay between consecutive samples. Allowed value is
17 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
19 - fsl,settling: delay between plate switch to next sample. Allowed value is
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