Lines Matching +full:per +full:- +full:soc
2 ------------------------------------
5 function for SoC control or status. Details vary considerably among from SoC
6 to SoC with no two being alike.
12 enable (and disable in some cases) SoC pin drivers, select peripheral clock
24 - compatible: must be "ti,c64x+dscr"
25 - reg: register area base and size
34 - ti,dscr-devstat
37 - ti,dscr-silicon-rev
40 - ti,dscr-rmii-resets
44 - ti,dscr-locked-regs
49 - ti,dscr-kick-regs
53 the second register before other registers in the area are write-enabled.
55 - ti,dscr-mac-fuse-regs
60 index (1-6) of the byte within the register. A value of 0 means the byte
63 - ti,dscr-devstate-ctl-regs
66 more devices (one bitfield per device). The layout of each tuple is:
77 nbits is the number of bits per device control
79 - ti,dscr-devstate-stat-regs
83 bitfield per device). The layout of each tuple is:
94 nbits is the number of bits per device status
96 - ti,dscr-privperm
98 some SoC devices.
103 device-state-config-regs@2a80000 {
107 ti,dscr-devstat = <0>;
108 ti,dscr-silicon-rev = <8 28 0xf>;
109 ti,dscr-rmii-resets = <0x40020 0x00040000>;
111 ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
112 ti,dscr-devstate-ctl-regs =
116 ti,dscr-devstate-stat-regs =
120 ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
123 ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
125 ti,dscr-kick-regs = <0x38 0x83E70B13