Lines Matching +full:per +full:- +full:soc
7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4…
21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For…
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY …
28 …-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work…
33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETI…
36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete…
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
40 …- ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED…
43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete…
50 …ate the maximum 4 uops retired per cycle has been achieved. Maximizing Retiring typically increas…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per cycle has been achieved. Maximizing Retiring typically increases the Instruction-Per-Cycle me…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
66 "BriefDescription": "Uops Per Instruction",
72 "BriefDescription": "Instruction per taken branch",
78 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
84 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
90 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
96 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
102 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
108 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
114 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
120 … "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
126 "BriefDescription": "Branch instructions per taken branch. ",
132 …"BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occ…
156 "BriefDescription": "Instructions Per Cycle (per physical core)",
162 "BriefDescription": "Instructions Per Cycle (per physical core)",
168 "BriefDescription": "Floating Point Operations Per Cycle",
174 "BriefDescription": "Floating Point Operations Per Cycle",
180 …"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is …
186 …"BriefDescription": "Branch Misprediction Cost: Fraction of TopDown slots wasted per non-speculati…
187 …- UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * ( IDQ_UOPS_NO…
192 …"BriefDescription": "Branch Misprediction Cost: Fraction of TopDown slots wasted per non-speculati…
193 …- UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALT…
198 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
210 … "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads (in core cycles)",
216 …BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is …
247 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
253 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
259 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
265 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
271 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…
277 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…
278 "MetricExpr": "1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY",
283 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
289 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…
295 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",
307 "BriefDescription": "Giga Floating Point Operations Per Second",
320 …"MetricExpr": "1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_…
333 "MetricGroup": "Memory_BW;SoC",
339 "MetricGroup": "Memory_Lat;SoC",
345 "MetricGroup": "Memory_BW;SoC",
349 …cy of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads …
351 "MetricGroup": "Memory_Lat;SoC;Server",
357 "MetricGroup": "Memory_BW;SoC;Server",
363 "MetricGroup": "Memory_BW;SoC;Server",
369 "MetricGroup": "IO_BW;SoC;Server",
375 "MetricGroup": "IO_BW;SoC;Server",
381 "MetricGroup": "SoC",
385 …"BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from applica…
391 "BriefDescription": "C3 residency percent per core",
392 "MetricExpr": "(cstate_core@c3\\-residency@ / msr@tsc@) * 100",
397 "BriefDescription": "C6 residency percent per core",
398 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
403 "BriefDescription": "C7 residency percent per core",
404 "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
409 "BriefDescription": "C2 residency percent per package",
410 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
415 "BriefDescription": "C3 residency percent per package",
416 "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100",
421 "BriefDescription": "C6 residency percent per package",
422 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
427 "BriefDescription": "C7 residency percent per package",
428 "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",