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/Linux-v5.15/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
31 - enum:
32 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
33 - ad,ad7414
34 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
[all …]
/Linux-v5.15/drivers/eisa/
Deisa.ids6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
[all …]
/Linux-v5.15/drivers/edac/
Dfsl_ddr_edac.h4 * Support Power-based SoCs including MPC85xx, MPC86xx, MPC83xx and
5 * ARM-based Layerscape SoCs including LS2xxx and LS1021A. Originally
10 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
57 #define DDR_EIE_SBEE 0x4 /* single-bit ECC error */
58 #define DDR_EIE_MBEE 0x8 /* multi-bit ECC error */
62 #define DDR_EDE_SBE 0x4 /* single-bit ECC error */
63 #define DDR_EDE_MBE 0x8 /* multi-bit ECC error */
68 #define DDR_EDI_SBED 0x4 /* single-bit ECC error disable */
69 #define DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */
/Linux-v5.15/drivers/media/dvb-frontends/drx39xyj/
Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
113 * + multi master mode means use of repeated starts
118 * Single/multi master selected via the flags in the FASI protocol.
121 * Default is single master, DAP FASI changes multi-master setting silently
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/
Dmulti-inno,mi0283qt.txt1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
[all …]
/Linux-v5.15/arch/powerpc/kvm/
Dbook3s_hv_ras.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #define SRR1_MC_LDSTERR (1ul << (63-42))
21 #define SRR1_MC_IFETCH_SH (63-45)
24 #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
25 #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
26 #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
29 #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
30 #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
32 #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
33 #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/timer/
Dandestech,atcpit100-timer.txt2 ------------------------------------------------------------------
6 This timer is a set of compact multi-function timers, which can be
10 multi-function timer and provide the following usage scenarios:
11 One 32-bit timer
12 Two 16-bit timers
13 Four 8-bit timers
14 One 16-bit PWM
15 One 16-bit timer and one 8-bit PWM
16 Two 8-bit timer and one 8-bit PWM
19 - compatible : Should be "andestech,atcpit100"
[all …]
/Linux-v5.15/arch/parisc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T if !64BIT
30 select GENERIC_ATOMIC64 if !64BIT
61 select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)
70 The PA-RISC microprocessor is designed by Hewlett-Packard and used
72 and later HP3000 series). The PA-RISC Linux project home page is
86 default "arch/parisc/configs/generic-32bit_defconfig" if !64BIT
87 default "arch/parisc/configs/generic-64bit_defconfig" if 64BIT
120 # unless you want to implement ACPI on PA-RISC ... ;-)
137 default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
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/Linux-v5.15/sound/pci/ctxfi/
Dctresource.c1 // SPDX-License-Identifier: GPL-2.0-only
21 /* Resource allocation based on bit-map management mechanism */
24 unsigned int multi, unsigned int *ridx) in get_resource() argument
29 for (i = 0, n = multi; i < amount; i++) { in get_resource()
33 n = multi; in get_resource()
36 if (!(--n)) in get_resource()
42 return -ENOENT; in get_resource()
45 /* Mark the contiguous bits in resource bit-map as used */ in get_resource()
46 for (n = multi; n > 0; n--) { in get_resource()
50 i--; in get_resource()
[all …]
/Linux-v5.15/arch/sh/mm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
9 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
12 On other systems (such as the SH-3 and 4) where an MMU exists,
72 config 29BIT
73 def_bool !32BIT
76 config 32BIT
81 bool "Support 32-bit physical addressing through PMB"
83 select 32BIT
87 32-bits through the SH-4A PMB. If this is not set, legacy
88 29-bit physical addressing will be used.
[all …]
/Linux-v5.15/drivers/iio/dac/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 tristate "Analog Devices AD5064 and similar multi-channel DAC driver"
14 AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R, AD5627, AD5627R,
28 AD5362, AD5363, AD5370, AD5371, AD5373 multi-channel
41 AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
51 Say yes here to build support for Analog Devices AD5421 loop-powered
52 digital-to-analog convertors (DAC).
128 tristate "Analog Devices AD5686 and similar multi-channel DACs (SPI)"
140 tristate "Analog Devices AD5696 and similar multi-channel DACs (I2C)"
153 tristate "Analog Devices AD5755/AD5755-1/AD5757/AD5735/AD5737 DAC driver"
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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dusb251xb.txt1 Microchip USB 2.0 Hi-Speed Hub Controller
4 Hi-Speed Controller.
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
11 - reg : I2C address on the selected bus (default is <0x2C>)
14 - reset-gpios : Should specify the gpio for hub reset
15 - vdd-supply : Should specify the phandle to the regulator supplying vdd
16 - skip-config : Skip Hub configuration, but only send the USB-Attach command
17 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
18 - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
19 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
[all …]
/Linux-v5.15/drivers/zorro/
Dzorro.ids4 # Maintained by Geert Uytterhoeven <zorro@linux-m68k.org>
12 # product product_name <-- single tab
23 0200 3-State
29 6700 A2386-SX [ISA Bus Bridge]
38 4500 A2232 Prototype [Multi I/O]
39 4600 A2232 [Multi I/O]
46 6700 A2386-SX [ISA Bus Bridge]
61 03ed A-Squared
70 0300 8-Up (Rev A) [RAM Expansion]
71 0400 8-Up (Rev Z) [RAM Expansion]
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/dma/
Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: "dma-controller.yaml#"
18 const: snps,dma-spear1340
20 "#dma-cells":
40 clock-names:
[all …]
/Linux-v5.15/drivers/gpu/drm/tiny/
Dmi0283qt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DRM driver for Multi-Inno MI0283QT panels
46 #define ILI9341_MADCTL_BGR BIT(3)
47 #define ILI9341_MADCTL_MV BIT(5)
48 #define ILI9341_MADCTL_MX BIT(6)
49 #define ILI9341_MADCTL_MY BIT(7)
55 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); in mi0283qt_enable()
56 struct mipi_dbi *dbi = &dbidev->dbi; in mi0283qt_enable()
60 if (!drm_dev_enter(pipe->crtc.dev, &idx)) in mi0283qt_enable()
116 * resets only on power-on and not on each reboot through in mi0283qt_enable()
[all …]
/Linux-v5.15/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
43 front one) and was so excited. It was even with "Four Channel" bit
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
[all …]
/Linux-v5.15/arch/x86/kernel/cpu/
Dhygon.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <asm/spec-ctrl.h>
37 for (i = apicid - 1; i >= 0; i--) { in nearby_node()
59 * (1) Hygon multi-node processors
67 /* get information required for multi-node processors */ in hygon_get_topology()
74 c->cpu_die_id = ecx & 0xff; in hygon_get_topology()
76 c->cpu_core_id = ebx & 0xff; in hygon_get_topology()
79 c->x86_max_cores /= smp_num_siblings; in hygon_get_topology()
87 c->x86_coreid_bits = get_count_order(c->x86_max_cores); in hygon_get_topology()
90 c->phys_proc_id = c->apicid >> APICID_SOCKET_ID_BIT; in hygon_get_topology()
[all …]
/Linux-v5.15/Documentation/input/devices/
Dsentelic.rst8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
30 |---------------| |---------------| |---------------| |---------------|
34 Bit5 => Y sign bit
35 Bit4 => X sign bit
40 Byte 2: X Movement(9-bit 2's complement integers)
41 Byte 3: Y Movement(9-bit 2's complement integers)
43 valid values, -8 ~ +7
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/amdzen1/
Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
[all …]
/Linux-v5.15/drivers/ata/
Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
25 * struct ftide010 - state container for the Faraday FTIDE010
49 /* Gemini-specific properties */
77 /* Set this bit for UDMA mode 5 and 6 */
78 #define FTIDE010_UDMA_TIMING_MODE_56 BIT(7)
81 #define FTIDE010_CLK_MOD_DEV0_CLK_SEL BIT(0)
82 #define FTIDE010_CLK_MOD_DEV1_CLK_SEL BIT(1)
84 #define FTIDE010_CLK_MOD_DEV0_UDMA_EN BIT(4)
85 #define FTIDE010_CLK_MOD_DEV1_UDMA_EN BIT(5)
103 * mdma_50_active_time: array of 4 elements for Td timing for multi
[all …]
/Linux-v5.15/drivers/pwm/
Dpwm-bcm-iproc.c39 #define IPROC_PWM_PRESCALE_SHIFT(ch) ((3 - (ch)) * \
61 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
63 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
65 /* must be a 400 ns delay between clearing and setting enable bit */ in iproc_pwmc_enable()
73 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
75 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
77 /* must be a 400 ns delay between clearing and setting enable bit */ in iproc_pwmc_disable()
85 u64 tmp, multi, rate; in iproc_pwmc_get_state() local
88 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_get_state()
90 if (value & BIT(IPROC_PWM_CTRL_EN_SHIFT(pwm->hwpwm))) in iproc_pwmc_get_state()
[all …]
/Linux-v5.15/arch/sparc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config 64BIT
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
53 def_bool !64BIT
63 def_bool 64BIT
148 default 4 if 64BIT
157 bool "Symmetric multi-processing support"
163 If you say N here, the kernel will run on uni- and multiprocessor
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dapm-xgene-phy.txt1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
18 bit lines from the automatic calibrated position.
19 Two set of 3-tuple setting for each (up to 3)
[all …]
/Linux-v5.15/drivers/net/wireless/ath/ath9k/
Dwmi.h2 * Copyright (c) 2010-2011 Atheros Communications Inc.
45 * 64 - HTC header - WMI header - 1 / txstatus
51 #define ATH9K_HTC_TXSTAT_ACK BIT(0)
52 #define ATH9K_HTC_TXSTAT_FILT BIT(1)
53 #define ATH9K_HTC_TXSTAT_RTC_CTS BIT(2)
54 #define ATH9K_HTC_TXSTAT_MCS BIT(3)
55 #define ATH9K_HTC_TXSTAT_CW40 BIT(4)
56 #define ATH9K_HTC_TXSTAT_SGI BIT(5)
167 /* multi write section */
173 /* multi rmw section */
[all …]
/Linux-v5.15/Documentation/fb/
Dviafb.rst6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
[all …]

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