Searched +full:mt8173 +full:- +full:mmsys (Results 1 – 25 of 29) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | mediatek-mdp.txt | 6 - compatible: "mediatek,mt8173-mdp" 7 - mediatek,vpu: the node of video processor unit, see 8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. 11 - compatible: Should be one of 12 "mediatek,mt8173-mdp-rdma" - read DMA 13 "mediatek,mt8173-mdp-rsz" - resizer 14 "mediatek,mt8173-mdp-wdma" - write DMA 15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation 16 - reg: Physical base address and length of the function block register space 17 - clocks: device clocks, see [all …]
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8183-larb-port.h> 13 #include <dt-bindings/power/mt8183-power.h> 14 #include <dt-bindings/reset/mt8183-resets.h> 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/thermal/thermal.h> [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/arm/mediatek/ |
D | mediatek,mmsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 title: MediaTek mmsys controller 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 The MediaTek mmsys system controller provides clock control, routing control, 14 and miscellaneous control in mmsys partition. 18 pattern: "^syscon@[0-9a-f]+$" 22 - items: [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 20 - mediatek,mt2701-hdmi 21 - mediatek,mt7623-hdmi 22 - mediatek,mt8167-hdmi 23 - mediatek,mt8173-hdmi 33 - description: Pixel Clock [all …]
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D | mediatek,split.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt8173-disp-split 33 power-domains: 36 Documentation/devicetree/bindings/power/power-domain.yaml for details. [all …]
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D | mediatek,aal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: 25 - mediatek,mt8173-disp-aal 26 - mediatek,mt8183-disp-aal 27 - items: [all …]
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D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt8173-disp-wdma 33 power-domains: 36 Documentation/devicetree/bindings/power/power-domain.yaml for details. [all …]
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D | mediatek,ufoe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 25 - items: 26 - const: mediatek,mt8173-disp-ufoe 34 power-domains: 37 Documentation/devicetree/bindings/power/power-domain.yaml for details. [all …]
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D | mediatek,od.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt2712-disp-od 26 - items: 27 - const: mediatek,mt8173-disp-od [all …]
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D | mediatek,color.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 25 - items: 26 - const: mediatek,mt2701-disp-color 27 - items: 28 - const: mediatek,mt8167-disp-color [all …]
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D | mediatek,gamma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt8173-disp-gamma 26 - items: 27 - const: mediatek,mt8183-disp-gamma [all …]
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D | mediatek,ovl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt2701-disp-ovl 26 - items: 27 - const: mediatek,mt8173-disp-ovl [all …]
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D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 data into DMA. It provides real time data to the back-end panel 20 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 26 - items: 27 - const: mediatek,mt2701-disp-rdma 28 - items: [all …]
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D | mediatek,merge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line 15 inputs into one side-by-side output. 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - items: 25 - const: mediatek,mt8173-disp-merge [all …]
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D | mediatek,dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a 21 - mediatek,mt2701-dpi 22 - mediatek,mt7623-dpi 23 - mediatek,mt8173-dpi 24 - mediatek,mt8183-dpi [all …]
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D | mediatek,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 - Jitao Shi <jitao.shi@mediatek.com> 13 - Xinlei Lee <xinlei.lee@mediatek.com> 17 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual- 21 - $ref: /schemas/display/dsi-controller.yaml# 26 - mediatek,mt2701-dsi [all …]
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/Linux-v6.1/drivers/clk/mediatek/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 23 bool "Clock driver for MediaTek MT2701 mmsys" 26 This driver supports MediaTek MT2701 mmsys clocks. 103 bool "Clock driver for MediaTek MT2712 mmsys" 106 This driver supports MediaTek MT2712 mmsys clocks. 147 bool "Clock driver for MediaTek MT6765 mmsys" 150 This driver supports MediaTek MT6765 mmsys clocks. 215 tristate "Clock driver for MediaTek MT6779 mmsys" 218 This driver supports MediaTek MT6779 mmsys clocks. 279 tristate "Clock driver for MediaTek MT6795 mmsys" [all …]
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/Linux-v6.1/drivers/gpu/drm/mediatek/ |
D | mtk_drm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 15 #include <linux/dma-mapping.h> 51 if (info->num_planes != 1) in mtk_drm_mode_fb_create() 52 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create() 347 struct mtk_drm_private *private = drm->dev_private; in mtk_drm_kms_init() 354 return -ENODEV; in mtk_drm_kms_init() 357 return -EPROBE_DEFER; in mtk_drm_kms_init() 359 pdev = of_find_device_by_node(private->mutex_node); in mtk_drm_kms_init() 361 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", in mtk_drm_kms_init() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/pwm/ |
D | mediatek,pwm-disp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jitao Shi <jitao.shi@mediatek.com> 11 - Xinlei Lee <xinlei.lee@mediatek.com> 14 - $ref: pwm.yaml# 19 - enum: 20 - mediatek,mt2701-disp-pwm 21 - mediatek,mt6595-disp-pwm [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/soc/mediatek/ |
D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 21 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex [all …]
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/Linux-v6.1/drivers/soc/mediatek/ |
D | mtk-mmsys.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/reset-controller.h> 13 #include <linux/soc/mediatek/mtk-mmsys.h> 15 #include "mtk-mmsys.h" 16 #include "mt8167-mmsys.h" 17 #include "mt8183-mmsys.h" 18 #include "mt8186-mmsys.h" 19 #include "mt8192-mmsys.h" 20 #include "mt8195-mmsys.h" 21 #include "mt8365-mmsys.h" [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | mt7623n.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright © 2017-2020 MediaTek Inc. 10 #include <dt-bindings/memory/mt2701-larb-port.h> 19 compatible = "mediatek,mt7623-g3dsys", 20 "mediatek,mt2701-g3dsys", 23 #clock-cells = <1>; 24 #reset-cells = <1>; 28 compatible = "mediatek,mt7623-mali", "arm,mali-450"; 41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", 46 clock-names = "bus", "core"; [all …]
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D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/ |
D | mediatek,smi-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195. 31 - enum: 32 - mediatek,mt2701-smi-common 33 - mediatek,mt2712-smi-common 34 - mediatek,mt6779-smi-common [all …]
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