Lines Matching +full:mt8173 +full:- +full:mmsys
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jitao Shi <jitao.shi@mediatek.com>
11 - Xinlei Lee <xinlei.lee@mediatek.com>
14 - $ref: pwm.yaml#
19 - enum:
20 - mediatek,mt2701-disp-pwm
21 - mediatek,mt6595-disp-pwm
22 - mediatek,mt8173-disp-pwm
23 - mediatek,mt8183-disp-pwm
24 - items:
25 - const: mediatek,mt8167-disp-pwm
26 - const: mediatek,mt8173-disp-pwm
27 - items:
28 - enum:
29 - mediatek,mt8186-disp-pwm
30 - mediatek,mt8188-disp-pwm
31 - mediatek,mt8192-disp-pwm
32 - mediatek,mt8195-disp-pwm
33 - const: mediatek,mt8183-disp-pwm
38 "#pwm-cells":
46 - description: Main Clock
47 - description: Mm Clock
49 clock-names:
51 - const: main
52 - const: mm
55 - compatible
56 - reg
57 - "#pwm-cells"
58 - clocks
59 - clock-names
64 - |
65 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 #include <dt-bindings/clock/mt8173-clk.h>
67 #include <dt-bindings/interrupt-controller/irq.h>
70 compatible = "mediatek,mt8173-disp-pwm";
72 #pwm-cells = <2>;
73 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
74 <&mmsys CLK_MM_DISP_PWM0MM>;
75 clock-names = "main", "mm";