Lines Matching +full:mt8173 +full:- +full:mmsys
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: MediaTek mmsys controller
10 - Matthias Brugger <matthias.bgg@gmail.com>
13 The MediaTek mmsys system controller provides clock control, routing control,
14 and miscellaneous control in mmsys partition.
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6795-mmsys
29 - mediatek,mt6797-mmsys
30 - mediatek,mt8167-mmsys
31 - mediatek,mt8173-mmsys
32 - mediatek,mt8183-mmsys
33 - mediatek,mt8186-mmsys
34 - mediatek,mt8192-mmsys
35 - mediatek,mt8195-mmsys
36 - mediatek,mt8365-mmsys
37 - const: syscon
38 - items:
39 - const: mediatek,mt7623-mmsys
40 - const: mediatek,mt2701-mmsys
41 - const: syscon
46 power-domains:
50 Documentation/devicetree/bindings/power/power-domain.yaml for details.
56 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
58 $ref: /schemas/types.yaml#/definitions/phandle-array
60 mediatek,gce-client-reg:
67 include/dt-bindings/gce/<chip>-gce.h.
68 $ref: /schemas/types.yaml#/definitions/phandle-array
71 "#clock-cells":
74 '#reset-cells':
78 - compatible
79 - reg
80 - "#clock-cells"
85 - |
86 #include <dt-bindings/power/mt8173-power.h>
87 #include <dt-bindings/gce/mt8173-gce.h>
89 mmsys: syscon@14000000 {
90 compatible = "mediatek,mt8173-mmsys", "syscon";
92 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
93 #clock-cells = <1>;
94 #reset-cells = <1>;
97 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;