Home
last modified time | relevance | path

Searched +full:misc +full:- +full:latch (Results 1 – 25 of 29) sorted by relevance

12

/Linux-v5.10/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath11k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
5 ---
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Kalle Valo <kvalo@codeaurora.org>
21 - qcom,ipq8074-wifi
22 - qcom,ipq6018-wifi
29 - description: misc-pulse1 interrupt events
30 - description: misc-latch interrupt events
31 - description: sw exception interrupt events
[all …]
/Linux-v5.10/include/uapi/linux/
Dscc.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
14 #define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
67 /* misc. parameters */
141 int command; /* one of the KISS-Commands defined above */
142 unsigned param; /* KISS-Param */
150 io_port vector_latch; /* INTACK-Latch (#) */
161 /* (#) only one INTACK latch allowed. */
/Linux-v5.10/drivers/net/hamradio/
Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 #define RES_EOM_L 0xC0 /* Reset EOM latch */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
117 /* Write Register 10 (misc control bits) */
149 /* Write Register 14 (Misc control bits) */
199 /* Read Register 2 (channel b only) - Interrupt vector */
211 /* Read Register 10 (misc status bits) */
227 #define AUTOEOM 0x02 /* Auto EOM Latch Reset */
/Linux-v5.10/drivers/tty/serial/
Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
67 #define RES_EOM_L 0xC0 /* Reset EOM latch */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
153 /* Write Register 10 (misc control bits) */
185 /* Write Register 14 (Misc control bits) */
235 /* Read Register 2 (channel b only) - Interrupt vector */
256 /* Read Register 10 (misc status bits) */
[all …]
Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
59 #define RES_EOM_L 0xC0 /* Reset EOM latch */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
130 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
155 /* Write Register 10 (misc control bits) */
187 /* Write Register 14 (Misc control bits) */
239 /* Read Register 2 (channel b only) - Interrupt vector */
264 /* Read Register 10 (misc status bits) */
[all …]
Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
[all …]
Dsc16is7xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
46 * - only on 75x/76x
49 * - only on 75x/76x
52 * - only on 75x/76x
55 * - only on 75x/76x
64 #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */
65 #define SC16IS7XX_DLH_REG (0x01) /* Divisor Latch High */
83 /* IER register bits - write only if (EFR[4] == 1) */
96 /* FCR register bits - write only if (EFR[4] == 1) */
[all …]
Dsunzilog.c1 // SPDX-License-Identifier: GPL-2.0
48 /* On 32-bit sparcs we need to delay after register accesses
50 * On 64-bit sparc we only need to flush single writes to ensure
61 readb(&((__channel)->control))
105 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
108 #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB)
109 #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE)
110 #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS)
111 #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB)
112 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS)
[all …]
/Linux-v5.10/drivers/net/wan/
Dz85230.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
56 #define RES_EOM_L 0xC0 /* Reset EOM latch */
112 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
121 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
123 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
138 /* Write Register 10 (misc control bits) */
170 /* Write Register 14 (Misc control bits) */
222 /* Read Register 2 (channel b only) - Interrupt vector */
234 /* Read Register 10 (misc status bits) */
[all …]
/Linux-v5.10/drivers/video/fbdev/
Dvga16fb.c2 * linux/drivers/video/vga16.c -- VGA 16-color framebuffer driver
6 * Based on VESA framebuffer (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
36 /* --------------------------------------------------------------------- */
47 unsigned char CrtCtrlIndex; /* CRT-Contr. Index reg. */
49 unsigned char HorizontalTotal; /* CRT-Controller:00h */
50 unsigned char HorizDisplayEnd; /* CRT-Controller:01h */
51 unsigned char StartHorizRetrace;/* CRT-Controller:04h */
52 unsigned char EndHorizRetrace; /* CRT-Controller:05h */
53 unsigned char Overflow; /* CRT-Controller:07h */
54 unsigned char StartVertRetrace; /* CRT-Controller:10h */
[all …]
/Linux-v5.10/drivers/crypto/caam/
Dregs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * CAAM hardware register-level view
5 * Copyright 2008-2011 Freescale Semiconductor, Inc.
15 #include <linux/io-64-nonatomic-hi-lo.h>
18 * Architecture-specific register access methods
20 * CAAM's bus-addressable registers are 64 bits internally.
21 * They have been wired to be safely accessible on 32-bit
24 * can be treated as two 32-bit entities, or finally (c) if they
25 * must be treated as a single 64-bit value, then this can safely
26 * be done with two 32-bit cycles.
[all …]
/Linux-v5.10/arch/sparc/kernel/
Dpci_psycho.c1 // SPDX-License-Identifier: GPL-2.0
31 /* Misc. PSYCHO PCI controller register offsets and definitions. */
97 #define PSYCHO_IOMMU_TSBSZ_1K 0x0000000000000000UL /* TSB Table 1024 8-byte entries */
98 #define PSYCHO_IOMMU_TSBSZ_2K 0x0000000000010000UL /* TSB Table 2048 8-byte entries */
99 #define PSYCHO_IOMMU_TSBSZ_4K 0x0000000000020000UL /* TSB Table 4096 8-byte entries */
100 #define PSYCHO_IOMMU_TSBSZ_8K 0x0000000000030000UL /* TSB Table 8192 8-byte entries */
101 #define PSYCHO_IOMMU_TSBSZ_16K 0x0000000000040000UL /* TSB Table 16k 8-byte entries */
102 #define PSYCHO_IOMMU_TSBSZ_32K 0x0000000000050000UL /* TSB Table 32k 8-byte entries */
103 #define PSYCHO_IOMMU_TSBSZ_64K 0x0000000000060000UL /* TSB Table 64k 8-byte entries */
104 #define PSYCHO_IOMMU_TSBSZ_128K 0x0000000000070000UL /* TSB Table 128k 8-byte entries */
[all …]
/Linux-v5.10/include/linux/mfd/
Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
179 #define CPCAP_REG_UIL 0x0e5c /* USB Interrupt Latch */
235 #define CPCAP_REG_LGPU 0x1264 /* LMR GCAI GPIO Pull-up */
240 #define CPCAP_REG_LMISC 0x1278 /* LMR Misc Bits */
/Linux-v5.10/drivers/net/wireless/ath/ath11k/
Dahb.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
10 #include <linux/dma-mapping.h>
20 { .compatible = "qcom,ipq8074-wifi",
23 { .compatible = "qcom,ipq6018-wifi",
41 "misc-pulse1",
42 "misc-latch",
43 "sw-exception",
57 "host2wbm-desc-feed",
58 "host2reo-re-injection",
[all …]
/Linux-v5.10/drivers/staging/comedi/drivers/
Ddt9812.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
78 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
79 DT9812_DEVID_DT9812_2PT5, /* 8 2 8 8 1 0-2.44V */
96 /* Read Flash memory misc config info */
180 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
193 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
208 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
239 struct dt9812_private *devpriv = dev->private; in dt9812_read_info()
249 ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr), in dt9812_read_info()
[all …]
/Linux-v5.10/drivers/net/phy/
Dbcm54140.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include "bcm-phy-lib.h"
15 /* RDB per-port registers
44 #define BCM54140_RDB_C_MISC_CTRL 0x02f /* misc copper control */
60 #define BCM54140_RDB_MON_CTRL_SEL_RR 3 /* meassure all round-robin */
61 #define BCM54140_RDB_MON_CTRL_PWR_DOWN BIT(0) /* power-down monitor */
80 * T = 413.35 - (0.49055 * bits[9:0])
82 #define BCM54140_HWMON_TO_TEMP(v) (413350L - (v) * 491)
83 #define BCM54140_HWMON_FROM_TEMP(v) DIV_ROUND_CLOSEST_ULL(413350L - (v), 491)
179 struct bcm54140_priv *priv = phydev->priv; in bcm54140_hwmon_read_alarm()
[all …]
/Linux-v5.10/drivers/media/platform/davinci/
Disif.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2008-2009 Texas Instruments Inc
146 /* reg_modify() - read, modify and write register */
200 val = (cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT) | cul->hcpat_odd; in isif_config_culling()
204 regw(cul->vcpat, CULV); in isif_config_culling()
208 cul->en_lpf << ISIF_LPF_SHIFT, MODESET); in isif_config_culling()
217 val = (!!gain_off_p->gain_sdram_en << GAIN_SDRAM_EN_SHIFT) | in isif_config_gain_offset()
218 (!!gain_off_p->gain_ipipe_en << GAIN_IPIPE_EN_SHIFT) | in isif_config_gain_offset()
219 (!!gain_off_p->gain_h3a_en << GAIN_H3A_EN_SHIFT) | in isif_config_gain_offset()
220 (!!gain_off_p->offset_sdram_en << OFST_SDRAM_EN_SHIFT) | in isif_config_gain_offset()
[all …]
Ddm355_ccdc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2005-2009 Texas Instruments Inc
6 * ------------------------------
11 * pre-process the Bayer RGB data, before writing it to SDRAM.
177 return -EFAULT; in ccdc_restore_defaults()
182 return -EFAULT; in ccdc_restore_defaults()
215 * ppc - per pixel count. indicates how many pixels per cell in ccdc_setwin()
219 horz_start = image_win->left << (ppc - 1); in ccdc_setwin()
220 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; in ccdc_setwin()
225 vert_start = image_win->top; in ccdc_setwin()
[all …]
Ddm644x_ccdc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2006-2009 Texas Instruments Inc
6 * ------------------------------
11 * pre-process the Raw Bayer RGB data, before writing it to SDRAM.
126 * ppc - per pixel count. indicates how many pixels per cell in ccdc_setwin()
130 horz_start = image_win->left << (ppc - 1); in ccdc_setwin()
131 horz_nr_pixels = (image_win->width << (ppc - 1)) - 1; in ccdc_setwin()
135 vert_start = image_win->top; in ccdc_setwin()
138 vert_nr_lines = (image_win->height >> 1) - 1; in ccdc_setwin()
149 vert_nr_lines = image_win->height - 1; in ccdc_setwin()
[all …]
/Linux-v5.10/drivers/macintosh/
Dvia-pmu.c1 // SPDX-License-Identifier: GPL-2.0
9 * to the keyboard and mouse, as well as the non-volatile RAM
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
14 * Copyright (C) 2006-2007 Johannes Berg
17 * - Cleanup atomically disabling reply to PMU events after
73 #include "via-pmu-event.h"
83 /* VIA registers - spaced 0x200 bytes apart */
85 #define B 0 /* B-side data */
86 #define A RS /* A-side data */
87 #define DIRB (2*RS) /* B-side direction (1=output) */
[all …]
/Linux-v5.10/arch/x86/kernel/
Dapm_32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* -*- linux-c -*-
4 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
16 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
43 * 1.1: support user-space standby and suspend, power off after system
46 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
48 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
63 * <echter@informatik.uni-rostock.de>
109 * <Walter.Hofmann@physik.stud.uni-erlangen.de>).
120 * Remove smp-power-off. SMP users must now specify
[all …]
/Linux-v5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_reg.h3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * R - Read only
14 * RC - Clear on read
15 * RW - Read/Write
16 * ST - Statistics register (clear on read)
17 * W - Write only
18 * WB - Wide bus register - the size is over 32 bits and it should be
20 * WR - Write Clear (write 1 to clear the bit)
32 /* [RW 1] Initiate the ATC array - reset all the valid bits */
56 * BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning -
[all …]
/Linux-v5.10/drivers/media/i2c/
Dov2640.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
22 #include <linux/v4l2-mediabus.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-subdev.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-image-sizes.h>
145 #define MC_BIST 0xF9 /* Microcontroller misc register */
163 #define GAIN 0x00 /* AGC - Gain control gain setting */
[all …]
/Linux-v5.10/drivers/media/tuners/
Dmxl5005s.c201 * MaxLinear source code - Common_MXL.h (?)
254 u8 CAPSELECT; /* 0: disable On-Chip pulling cap; 1: enable */
258 /* 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable */
262 /* 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H */
325 /* ----------------------------------------------------------------
334 * Revision: 080314 - original version
339 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_SetRfFreqHz()
354 ByteTable[0] |= state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
371 state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
387 state->config->AgcMasterByte ; in mxl5005s_SetRfFreqHz()
[all …]
/Linux-v5.10/drivers/net/ethernet/intel/e1000/
De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
425 /* MAC decode size is 128K - This is the size of BAR0 */
446 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
489 * E1000_RAR_ENTRIES - 1 multicast addresses.
506 /* Receive Descriptor - Extended */
532 /* Receive Descriptor - Packet Split */
556 __le16 length[3]; /* length of buffers 1-3 */
570 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
773 * RW - register is both readable and writable
[all …]

12