Lines Matching +full:misc +full:- +full:latch
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2005-2009 Texas Instruments Inc
6 * ------------------------------
11 * pre-process the Bayer RGB data, before writing it to SDRAM.
177 return -EFAULT; in ccdc_restore_defaults()
182 return -EFAULT; in ccdc_restore_defaults()
215 * ppc - per pixel count. indicates how many pixels per cell in ccdc_setwin()
219 horz_start = image_win->left << (ppc - 1); in ccdc_setwin()
220 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; in ccdc_setwin()
225 vert_start = image_win->top; in ccdc_setwin()
228 vert_nr_lines = (image_win->height >> 1) - 1; in ccdc_setwin()
237 vert_nr_lines = image_win->height - 1; in ccdc_setwin()
239 mid_img = vert_start + (image_win->height / 2); in ccdc_setwin()
260 temp = (((params->pix_fmt & CCDC_INPUT_MODE_MASK) << in ccdc_config_ycbcr()
262 ((params->frm_fmt & CCDC_FRM_FMT_MASK) << in ccdc_config_ycbcr()
266 if (params->bt656_enable) { in ccdc_config_ycbcr()
270 * vd negative, 8-bit pack mode in ccdc_config_ycbcr()
274 temp |= (((params->fid_pol & CCDC_FID_POL_MASK) << in ccdc_config_ycbcr()
276 ((params->hd_pol & CCDC_HD_POL_MASK) << in ccdc_config_ycbcr()
278 ((params->vd_pol & CCDC_VD_POL_MASK) << in ccdc_config_ycbcr()
282 /* pack the data to 8-bit */ in ccdc_config_ycbcr()
288 ccdc_setwin(¶ms->win, params->frm_fmt, 2); in ccdc_config_ycbcr()
290 /* configure the order of y cb cr in SD-RAM */ in ccdc_config_ycbcr()
291 temp = (params->pix_order << CCDC_Y8POS_SHIFT); in ccdc_config_ycbcr()
300 regw(((params->win.width * 2 + 31) >> 5), HSIZE); in ccdc_config_ycbcr()
303 if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) { in ccdc_config_ycbcr()
319 if (!bclamp->b_clamp_enable) { in ccdc_config_black_clamp()
321 regw(bclamp->dc_sub & CCDC_BLK_DC_SUB_MASK, DCSUB); in ccdc_config_black_clamp()
326 val = (bclamp->start_pixel & CCDC_BLK_ST_PXL_MASK) | in ccdc_config_black_clamp()
327 ((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) << in ccdc_config_black_clamp()
332 val = (bclamp->sample_ln & CCDC_NUM_LINE_CALC_MASK) in ccdc_config_black_clamp()
345 val = (bcomp->b & CCDC_BLK_COMP_MASK) | in ccdc_config_black_compense()
346 ((bcomp->gb & CCDC_BLK_COMP_MASK) << in ccdc_config_black_compense()
350 val = ((bcomp->gr & CCDC_BLK_COMP_MASK) << in ccdc_config_black_compense()
352 ((bcomp->r & CCDC_BLK_COMP_MASK) << in ccdc_config_black_compense()
363 /* TODO This is to be re-visited and adjusted */ in ccdc_write_dfc_entry()
367 regw(dfc->dft_corr_vert[index], DFCMEM0); in ccdc_write_dfc_entry()
368 regw(dfc->dft_corr_horz[index], DFCMEM1); in ccdc_write_dfc_entry()
369 regw(dfc->dft_corr_sub1[index], DFCMEM2); in ccdc_write_dfc_entry()
370 regw(dfc->dft_corr_sub2[index], DFCMEM3); in ccdc_write_dfc_entry()
371 regw(dfc->dft_corr_sub3[index], DFCMEM4); in ccdc_write_dfc_entry()
381 count--; in ccdc_write_dfc_entry()
383 * TODO We expect the count to be non-zero to be successful. Adjust in ccdc_write_dfc_entry()
389 return -1; in ccdc_write_dfc_entry()
404 val = dfc->gen_dft_en & CCDC_DFCCTL_GDFCEN_MASK; in ccdc_config_vdfc()
407 if (!dfc->ver_dft_en) { in ccdc_config_vdfc()
413 if (dfc->table_size > CCDC_DFT_TABLE_SIZE) in ccdc_config_vdfc()
414 return -EINVAL; in ccdc_config_vdfc()
417 val |= (dfc->dft_corr_ctl.vdfcsl & CCDC_DFCCTL_VDFCSL_MASK) << in ccdc_config_vdfc()
419 val |= (dfc->dft_corr_ctl.vdfcuda & CCDC_DFCCTL_VDFCUDA_MASK) << in ccdc_config_vdfc()
421 val |= (dfc->dft_corr_ctl.vdflsft & CCDC_DFCCTL_VDFLSFT_MASK) << in ccdc_config_vdfc()
429 for (i = 0; i < dfc->table_size; i++) { in ccdc_config_vdfc()
435 return -EFAULT; in ccdc_config_vdfc()
439 regw(dfc->saturation_ctl & CCDC_VDC_DFCVSAT_MASK, DFCVSAT); in ccdc_config_vdfc()
449 * Each register CSCM0-7 has two values in S8Q5 format.
456 if (!csc->enable) in ccdc_config_csc()
459 /* Enable the CSC sub-module */ in ccdc_config_csc()
462 /* Converting the co-eff as per the format of the register */ in ccdc_config_csc()
465 /* CSCM - LSB */ in ccdc_config_csc()
466 val1 = (csc->coeff[i].integer & in ccdc_config_csc()
471 * precision, user values range from .00 - 0.99 in ccdc_config_csc()
473 val1 |= (((csc->coeff[i].decimal & in ccdc_config_csc()
478 /* CSCM - MSB */ in ccdc_config_csc()
479 val2 = (csc->coeff[i].integer & in ccdc_config_csc()
482 val2 |= (((csc->coeff[i].decimal & in ccdc_config_csc()
487 regw(val2, (CSCM0 + ((i - 1) << 1))); in ccdc_config_csc()
501 val = (pat0->olop | (pat0->olep << 2) | (pat0->elop << 4) | in ccdc_config_color_patterns()
502 (pat0->elep << 6) | (pat1->olop << 8) | (pat1->olep << 10) | in ccdc_config_color_patterns()
503 (pat1->elop << 12) | (pat1->elep << 14)); in ccdc_config_color_patterns()
522 * set FID detection function to Latch at V-Sync in ccdc_config_raw()
523 * set WENLOG - ccdc valid area to AND in ccdc_config_raw()
526 * disable latching function on VSYNC - shadowed registers in ccdc_config_raw()
544 val |= (((params->vd_pol & CCDC_VD_POL_MASK) << CCDC_VD_POL_SHIFT) | in ccdc_config_raw()
545 ((params->hd_pol & CCDC_HD_POL_MASK) << CCDC_HD_POL_SHIFT) | in ccdc_config_raw()
546 ((params->fid_pol & CCDC_FID_POL_MASK) << CCDC_FID_POL_SHIFT) | in ccdc_config_raw()
547 ((params->frm_fmt & CCDC_FRM_FMT_MASK) << CCDC_FRM_FMT_SHIFT) | in ccdc_config_raw()
548 ((params->pix_fmt & CCDC_PIX_FMT_MASK) << CCDC_PIX_FMT_SHIFT)); in ccdc_config_raw()
551 if ((config_params->data_sz == CCDC_DATA_8BITS) || in ccdc_config_raw()
552 config_params->alaw.enable) in ccdc_config_raw()
556 if (config_params->lpf_enable) in ccdc_config_raw()
557 val |= (config_params->lpf_enable & CCDC_LPF_MASK) << in ccdc_config_raw()
561 val |= (config_params->datasft & CCDC_DATASFT_MASK) << in ccdc_config_raw()
567 regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT); in ccdc_config_raw()
569 /* Configure GAMMAWD register. defaur 11-2, and Mosaic cfa pattern */ in ccdc_config_raw()
574 if (config_params->alaw.enable) { in ccdc_config_raw()
576 ((config_params->alaw.gamma_wd & in ccdc_config_raw()
582 val |= ((config_params->mfilt1 << CCDC_MFILT1_SHIFT) | in ccdc_config_raw()
583 (config_params->mfilt2 << CCDC_MFILT2_SHIFT)); in ccdc_config_raw()
589 ccdc_setwin(¶ms->win, params->frm_fmt, 1); in ccdc_config_raw()
592 ccdc_config_black_clamp(&config_params->blk_clamp); in ccdc_config_raw()
595 ccdc_config_black_compense(&config_params->blk_comp); in ccdc_config_raw()
598 if (ccdc_config_vdfc(&config_params->vertical_dft) < 0) in ccdc_config_raw()
599 return -EFAULT; in ccdc_config_raw()
602 ccdc_config_csc(&config_params->csc); in ccdc_config_raw()
605 ccdc_config_color_patterns(&config_params->col_pat_field0, in ccdc_config_raw()
606 &config_params->col_pat_field1); in ccdc_config_raw()
614 val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) << in ccdc_config_raw()
616 val |= (config_params->data_offset.vert_offset & CCDC_DATAOFST_MASK) << in ccdc_config_raw()
621 val = (params->horz_flip_enable & CCDC_HSIZE_FLIP_MASK) << in ccdc_config_raw()
625 if ((config_params->data_sz == CCDC_DATA_8BITS) || in ccdc_config_raw()
626 config_params->alaw.enable) { in ccdc_config_raw()
627 val |= (((params->win.width) + 31) >> 5) & in ccdc_config_raw()
632 (((params->win.width) + 31) >> 5) & in ccdc_config_raw()
636 val |= (((params->win.width * 2) + 31) >> 5) & in ccdc_config_raw()
640 (((params->win.width * 2) + 31) >> 5) & in ccdc_config_raw()
646 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) { in ccdc_config_raw()
647 if (params->image_invert_enable) { in ccdc_config_raw()
658 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { in ccdc_config_raw()
659 if (params->image_invert_enable) { in ccdc_config_raw()
701 int ret = -EINVAL; in ccdc_enum_pix()
723 alaw->enable = 1; in ccdc_set_pixel_format()
725 return -EINVAL; in ccdc_set_pixel_format()
732 return -EINVAL; in ccdc_set_pixel_format()
742 if (alaw->enable) in ccdc_get_pixel_format()
778 if ((config_params->alaw.enable) || in ccdc_get_line_length()
779 (config_params->data_sz == CCDC_DATA_8BITS)) in ccdc_get_line_length()
810 /* misc operations */
819 ccdc_cfg.if_type = params->if_type; in ccdc_set_hw_if_params()
821 switch (params->if_type) { in ccdc_set_hw_if_params()
825 ccdc_cfg.ycbcr.vd_pol = params->vdpol; in ccdc_set_hw_if_params()
826 ccdc_cfg.ycbcr.hd_pol = params->hdpol; in ccdc_set_hw_if_params()
830 return -EINVAL; in ccdc_set_hw_if_params()
876 status = -ENODEV; in dm355_ccdc_probe()
880 res = request_mem_region(res->start, resource_size(res), res->name); in dm355_ccdc_probe()
882 status = -EBUSY; in dm355_ccdc_probe()
886 ccdc_cfg.base_addr = ioremap(res->start, resource_size(res)); in dm355_ccdc_probe()
888 status = -ENOMEM; in dm355_ccdc_probe()
893 if (NULL == pdev->dev.platform_data) { in dm355_ccdc_probe()
894 status = -ENODEV; in dm355_ccdc_probe()
897 setup_pinmux = pdev->dev.platform_data; in dm355_ccdc_probe()
903 ccdc_cfg.dev = &pdev->dev; in dm355_ccdc_probe()
909 release_mem_region(res->start, resource_size(res)); in dm355_ccdc_probe()
922 release_mem_region(res->start, resource_size(res)); in dm355_ccdc_remove()